參數(shù)資料
型號： S29GL064M90TAIR42
廠商： SPANSION LLC
元件分類： DRAM
英文描述： 256,128,64,32,Megabit 3.0 Volt-only Page Mode Flash Memory featuring 0.23 レm MirrorBit Process Technology
中文描述： 4M X 16 FLASH 3V PROM, 90 ns, PDSO48
封裝： MO-142-EC, TSOP-48
文件頁數(shù)： 74/116頁
文件大?。?/td> 1656K
代理商： S29GL064M90TAIR42
72
S29GL-M MirrorBit
TM
Flash Family
S29GL-M_00_B6 October 10, 2006
D a t a S h e e t
Notes:
1.
VA = Valid address for programming. During a sector erase operation, a valid address is any
sector address within the sector being erased. During chip erase, a valid address is any
non-protected sector address.
DQ7 should be rechecked even if DQ5 = “1” because DQ7 can change simultaneously with DQ5.
Figure 7. Data# Polling Algorithm
2.
RY/BY#: Ready/Busy#
The RY/BY# is a dedicated, open-drain output pin which indicates whether an Embedded Algo-
rithm is in progress or complete. The RY/BY# status is valid after the rising edge of the final WE#
pulse in the command sequence. Since RY/BY# is an open-drain output, several RY/BY# pins can
be tied together in parallel with a pull-up resistor to V
CC
.
If the output is low (Busy), the device is actively erasing or programming. (This includes program-
ming in the Erase Suspend mode.) If the output is high (Ready), the device is in the read mode,
the standby mode, or in the erase-suspend-read mode.
Table 36
shows the outputs for RY/BY#.
DQ6: Toggle Bit I
Toggle Bit I on DQ6 indicates whether an Embedded Program or Erase algorithm is in progress or
complete, or whether the device entered the Erase Suspend mode. Toggle Bit I may be read at
any address, and is valid after the rising edge of the final WE# pulse in the command sequence
(prior to the program or erase operation), and during the sector erase time-out.
During an Embedded Program or Erase algorithm operation, successive read cycles to any ad-
dress cause DQ6 to toggle. The system may use either OE# or CE# to control the read cycles.
When the operation is complete, DQ6 stops toggling.
DQ7 = Data
Yes
No
No
DQ5 = 1
No
Yes
Yes
FAIL
PASS
Read DQ15–DQ0
Addr = VA
Read DQ15–DQ0
Addr = VA
DQ7 = Data
START
相關(guān)PDF資料
PDF描述
S29GL064M90TAIR43 256,128,64,32,Megabit 3.0 Volt-only Page Mode Flash Memory featuring 0.23 レm MirrorBit Process Technology
S29GL064M90TAIR70 256,128,64,32,Megabit 3.0 Volt-only Page Mode Flash Memory featuring 0.23 レm MirrorBit Process Technology
S29GL064M90TAIR72 256,128,64,32,Megabit 3.0 Volt-only Page Mode Flash Memory featuring 0.23 レm MirrorBit Process Technology
S29GL064M90TAIR73 256,128,64,32,Megabit 3.0 Volt-only Page Mode Flash Memory featuring 0.23 レm MirrorBit Process Technology
S29GL064M90TAIR80 256,128,64,32,Megabit 3.0 Volt-only Page Mode Flash Memory featuring 0.23 レm MirrorBit Process Technology
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
S29GL064M90TAIR60 制造商:Spansion 功能描述:Flash Mem Parallel 3.3V 64M-Bit 4M x 16 90ns 48-Pin TSOP Tray
S29GL064M90TAIR70 制造商:Spansion 功能描述:Flash Mem Parallel 3V/3.3V 64M-Bit 4M x 16 90ns 48-Pin TSOP Tray
S29GL064M90TFIR20 制造商:Spansion 功能描述:Flash Mem Parallel 3V/3.3V 64M-Bit 8M x 8/4M x 16 90ns 56-Pin TSOP Tray
S29GL064M90TFIR30 制造商:Spansion 功能描述:Flash Mem Parallel 3V/3.3V 64M-Bit 8M x 8/4M x 16 90ns 48-Pin TSOP Tray
S29GL064M90TFIR4 制造商:Spansion 功能描述:IC,EEPROM,NOR FLASH,4MX16/8MX8,CMOS,TSSOP,48PIN,PLASTIC
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