- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄365390 > S29GL064M90TAIR42 (SPANSION LLC) 256,128,64,32,Megabit 3.0 Volt-only Page Mode Flash Memory featuring 0.23 レm MirrorBit Process Technology PDF資料下載
參數(shù)資料
| 型號： | S29GL064M90TAIR42 |
| 廠商： | SPANSION LLC |
| 元件分類： | DRAM |
| 英文描述： | 256,128,64,32,Megabit 3.0 Volt-only Page Mode Flash Memory featuring 0.23 レm MirrorBit Process Technology |
| 中文描述： | 4M X 16 FLASH 3V PROM, 90 ns, PDSO48 |
| 封裝： | MO-142-EC, TSOP-48 |
| 文件頁數(shù)： | 68/116頁 |
| 文件大小： | 1656K |
| 代理商： | S29GL064M90TAIR42 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁當前第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁
66
S29GL-M MirrorBit
TM
Flash Family
S29GL-M_00_B6 October 10, 2006
D a t a S h e e t
Figure 5. Program Suspend/Program Resume
Chip Erase Command Sequence
Chip erase is a six bus cycle operation. The chip erase command sequence is initiated by writing
two unlock cycles, followed by a set-up command. Two additional unlock write cycles are then
followed by the chip erase command, which in turn invokes the Embedded Erase algorithm. The
device does
not
require the system to preprogram prior to erase. The Embedded Erase algorithm
automatically preprograms and verifies the entire memory for an all zero data pattern prior to
electrical erase. The system is not required to provide any controls or timings during these oper-
ations.
Table 34
and
Table 35
show the address and data requirements for the chip erase
command sequence.
When the Embedded Erase algorithm is complete, the device returns to the read mode and ad-
dresses are no longer latched. The system can determine the status of the erase operation by
using DQ7, DQ6, or DQ2. See
Write Operation Status
for information on these status bits.
Any commands written during the chip erase operation are ignored. However, note that a
hard-
w are reset
immediately terminates the erase operation. If that occurs, the chip erase command
sequence should be reinitiated once the device returns to reading array data, to ensure data
integrity.
Figure 6
illustrates the algorithm for the erase operation. See
Erase and Programming Perfor-
mance
in
AC Characteristics
for parameters, and
Figure 18
for timing diagrams.
Sector Erase Command Sequence
Sector erase is a six bus cycle operation. The sector erase command sequence is initiated by writ-
ing two unlock cycles, followed by a set-up command. Two additional unlock cycles are written,
and are then followed by the address of the sector to be erased, and the sector erase command.
Table 34
and
Table 35
shows the address and data requirements for the sector erase command
sequence.
Program Operation
or Write-to-Buffer
Sequence in Progress
Write Program Suspend
Command Sequence
Command is also valid for
Erase-suspended-program
operations
Autoselect and SecSi Sector
read operations are also allowed
Data cannot be read from erase- or
program-suspended sectors
Write Program Resume
Command Sequence
Read data as
required
Done
reading
No
Yes
Write address/data
XXXh/30h
Device reverts to
operation prior to
Program Suspend
Write address/data
XXXh/B0h
Wait 15
μ
s
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S29GL064M90TAIR43 | 256,128,64,32,Megabit 3.0 Volt-only Page Mode Flash Memory featuring 0.23 レm MirrorBit Process Technology |
| S29GL064M90TAIR70 | 256,128,64,32,Megabit 3.0 Volt-only Page Mode Flash Memory featuring 0.23 レm MirrorBit Process Technology |
| S29GL064M90TAIR72 | 256,128,64,32,Megabit 3.0 Volt-only Page Mode Flash Memory featuring 0.23 レm MirrorBit Process Technology |
| S29GL064M90TAIR73 | 256,128,64,32,Megabit 3.0 Volt-only Page Mode Flash Memory featuring 0.23 レm MirrorBit Process Technology |
| S29GL064M90TAIR80 | 256,128,64,32,Megabit 3.0 Volt-only Page Mode Flash Memory featuring 0.23 レm MirrorBit Process Technology |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S29GL064M90TAIR60 | 制造商:Spansion 功能描述:Flash Mem Parallel 3.3V 64M-Bit 4M x 16 90ns 48-Pin TSOP Tray |
| S29GL064M90TAIR70 | 制造商:Spansion 功能描述:Flash Mem Parallel 3V/3.3V 64M-Bit 4M x 16 90ns 48-Pin TSOP Tray |
| S29GL064M90TFIR20 | 制造商:Spansion 功能描述:Flash Mem Parallel 3V/3.3V 64M-Bit 8M x 8/4M x 16 90ns 56-Pin TSOP Tray |
| S29GL064M90TFIR30 | 制造商:Spansion 功能描述:Flash Mem Parallel 3V/3.3V 64M-Bit 8M x 8/4M x 16 90ns 48-Pin TSOP Tray |
| S29GL064M90TFIR4 | 制造商:Spansion 功能描述:IC,EEPROM,NOR FLASH,4MX16/8MX8,CMOS,TSSOP,48PIN,PLASTIC |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。