參數(shù)資料
型號: S29GL064M90TAIR42
廠商: SPANSION LLC
元件分類: DRAM
英文描述: 256,128,64,32,Megabit 3.0 Volt-only Page Mode Flash Memory featuring 0.23 レm MirrorBit Process Technology
中文描述: 4M X 16 FLASH 3V PROM, 90 ns, PDSO48
封裝: MO-142-EC, TSOP-48
文件頁數(shù): 100/116頁
文件大?。?/td> 1656K
代理商: S29GL064M90TAIR42
98
S29GL-M MirrorBit
TM
Flash Family
S29GL-M_00_B6 October 10, 2006
D a t a S h e e t
Erase and Programming Performance
Notes:
1.
Typical program and erase times assume the following conditions: 25
°
C, V
CC
= 3.0V, 10,000
cycles; checkerboard data pattern.
Under worst case conditions of 90
°
C; Worst case V
, 100,000 cycles.
Effective programming time (typ) is 15
μ
s (per word), 7.5
μ
s (per byte).
Effective accelerated programming time (typ) is 12.5
μ
s (per word), 6.3
μ
s (per byte).
Effective write buffer specification is calculated on a per-word/per-byte basis for a 16-word/32-
byte write buffer operation.
In the pre-programming step of the Embedded Erase algorithm, all bits are programmed to 00h
before erasure.
System-level overhead is the time required to execute the command sequence(s) for the program
command. See
Table 34
and
Table 35
for further information on command definitions.
2.
3.
4.
5.
6.
7.
TSOP Pin and BGA Package Capacitance
For package types TA, TF, BA, BF, FA, FF (refer to Ordering Information Pages):
For package types TB, TC, BB, BC, (refer to Ordering Information Pages):
Notes:
1.
2.
Sampled, not 100% tested.
Test conditions T
A
= 25°C, f = 1.0 MHz.
Parameter
( Notes)
Typ
(
Note 1
)
Max
(
Note 2
)
Unit
Comments
Sector Erase Time
0.5
3.5
sec
Excludes 00h
programming
prior to
erasure
(
Note 6
)
Chip Erase Time
S29GL032M
32
64
sec
S29GL064M
64
128
S29GL128M
128
256
S29GL256M
256
512
Total Write Buffer Program Time (
3
,
5
)
240
μs
Excludes
system level
overhead
(
Note 7
)
Total Accelerated Effective Write Buffer Program Time
(
4
,
5
)
200
μs
Chip Program Time
S29GL032M
31.5
sec
S29GL064M
63
S29GL128M
126
S29GL256M
252
Parameter
Symbol
Parameter
Description
Test
Setup
Typ
Max
Unit
C
IN
Input Capacitance
V
IN
= 0
TSOP
6
7.5
pF
BGA
4.2
5.0
pF
C
OUT
Output Capacitance
V
OUT
= 0
TSOP
8.5
12
pF
BGA
5.4
6.5
pF
C
IN2
Control Pin Capacitance
V
IN
= 0
TSOP
7.5
9
pF
BGA
3.9
4.7
pF
Parameter
Symbol
Parameter
Description
Test
Setup
Typ
Max
Unit
C
IN
Input Capacitance
V
IN
= 0
TSOP
8
10
pF
BGA
8
10
pF
C
OUT
Output Capacitance
V
OUT
= 0
TSOP
8.5
12
pF
BGA
8.5
12
pF
C
IN2
Control Pin Capacitance
V
IN
= 0
TSOP
8
10
pF
BGA
8
10
pF
C
IN3
RESET# and WP#/ACC Pin Capacitance
V
IN
= 0
TSOP
20
25
pF
BGA
15
20
pF
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