參數(shù)資料
型號(hào): S29GL064M90TAIR42
廠商: SPANSION LLC
元件分類: DRAM
英文描述: 256,128,64,32,Megabit 3.0 Volt-only Page Mode Flash Memory featuring 0.23 レm MirrorBit Process Technology
中文描述: 4M X 16 FLASH 3V PROM, 90 ns, PDSO48
封裝: MO-142-EC, TSOP-48
文件頁數(shù): 69/116頁
文件大?。?/td> 1656K
代理商: S29GL064M90TAIR42
October 10, 2006 S29GL-M_00_B6
S29GL-M MirrorBit
TM
Flash Family
67
D a t a S h e e t
The device does
not
require the system to preprogram prior to erase. The Embedded Erase algo-
rithm automatically programs and verifies the entire memory for an all zero data pattern prior to
electrical erase. The system is not required to provide any controls or timings during these
operations.
After the command sequence is written, a sector erase time-out of 50 μs occurs. During the time-
out period, additional sector addresses and sector erase commands can be written. Loading the
sector erase buffer can be done in any sequence, and the number of sectors can be from one
sector to all sectors. The time between these additional cycles must be less than 50 μs, otherwise
erasure may begin. Any sector erase address and command following the exceeded time-out can
or cannot be accepted. It is recommended that processor interrupts be disabled during this time
to ensure all commands are accepted. The interrupts can be re-enabled after the last Sector Erase
command is written.
Any command other than Sector Erase or Erase Suspend during the
time-out period resets the device to the read mode.
Note that the Secured Silicon Sector,
autoselect, and CFI functions are unavailable when an erase operation is in progress
.
The system
must rewrite the command sequence and any additional addresses and commands.
The system can monitor DQ3 to determine if the sector erase timer has timed out (See the section
on DQ3: Sector Erase Timer.). The time-out begins from the rising edge of the final WE# pulse in
the command sequence.
When the Embedded Erase algorithm is complete, the device returns to reading array data and
addresses are no longer latched. The system can determine the status of the erase operation by
reading DQ7, DQ6, or DQ2 in the erasing sector. See
Write Operation Status
for information on
these status bits.
Once the sector erase operation starts, only the Erase Suspend command is valid. All other com-
mands are ignored. However, note that a
hardw are reset
immediately
terminates the erase
operation. If that occurs, the sector erase command sequence should be reinitiated once the de-
vice returns to reading array data, to ensure data integrity.
Figure 6
illustrates the algorithm for the erase operation. See
Erase and Programming Perfor-
mance
in
AC Characteristics
for parameters, and
Figure 18
for timing diagrams.
l
Notes:
1.
2.
See
Table 34
and
Table 35
for program command sequence.
See
DQ3: Sector Erase Timer
for information on the sector erase timer.
Figure 6. Erase Operation
START
Write Erase
Command Sequence
(Notes 1, 2)
Data Poll to Erasing
Bank from System
Data = FFh
No
Yes
Erasure Completed
Embedded
Erase
algorithm
in progress
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