- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄25640 > S1C63158D0A010P 4-BIT, FLASH, 4 MHz, MICROCONTROLLER, UUC53 PDF資料下載
參數(shù)資料
| 型號(hào)： | S1C63158D0A010P |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, FLASH, 4 MHz, MICROCONTROLLER, UUC53 |
| 封裝： | DIE-53 |
| 文件頁(yè)數(shù)： | 139/159頁(yè) |
| 文件大?。?/td> | 1200K |
| 代理商： | S1C63158D0A010P |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)當(dāng)前第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)
72
EPSON
S1C63808 TECHNICAL MANUAL
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Serial Interface)
4.10 Serial Interface
4.10.1 Configuration of serial interface
The S1C63808 incorporates two channels of full duplex serial interface ports (when asynchronous system
is selected) that allows the user to select either clock synchronous system or asynchronous system.
The data transfer method can be selected in software.
When the clock synchronous system is selected, 8-bit data transfer is possible.
When the asynchronous system is selected, either 7-bit or 8-bit data transfer is possible, and a parity
check of received data and the addition of a parity bit for transmitting data can automatically be done by
selecting in software.
Figure 4.10.1.1 shows the configuration of the serial interface.
fOSC3
Data bus
SOUTx
Serial I/O control
& status register
Received
data buffer
Interrupt
control circuit
Serial input
control circuit
Received data
shift register
Transmitting data
shift register
Serial output
control circuit
SINx
Clock
control circuit
READY output
control circuit
SCLKx
or
SCLKx
Error detection
circuit
SRDYx
or
SRDYx
Start bit
detection circuit
Programmable timer 1 underflow signal
Interrupt
request
OSC3 oscillation circuit
Fig. 4.10.1.1 Configuration of serial interface
Note: Channels 1 and 2 of the serial interface are precisely identical, and the signal and register names
are identified by the channel number (1 or 2) attached (e.g. the SIN1 terminal is for channel 1 and
SIN2 terminal is for channel 2). This section explains the serial interface functions in common to
both channels using common signal names with "x" attached as a substitute for the channel
number (e.g. SIN1/SIN2
→ SINx) except the part that needs distinction.
Serial interface 1 input/output terminals, SIN1, SOUT1, SCLK1 and SRDY1 are shared with the I/O ports
P10–P13. Serial interface 2 input/output terminals, SIN2, SOUT2, SCLK2 and SRDY2 are shared with the I/
O ports P20–P23. In order to utilize these terminals for the serial interface input/output terminals, proper
settings have to be made with registers ESIFx, SMDx0 and SMDx1. (At initial reset, these terminals are set
as I/O port terminals.)
The direction of I/O port terminals set for serial interface input/output terminals are determined by the
signal and transfer mode for each terminal. Furthermore, the settings for the corresponding I/O control
registers for the I/O ports become invalid.
Table 4.10.1.1 Configuration of input/output terminals
Terminal
When serial interface is selected
P10
P11
P12
P13
P20
P21
P22
P23
SIN1
SOUT1
SCLK1
SRDY1
SIN2
SOUT2
SCLK2
SRDY2
* The terminals used may change according to the transfer mode.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S1C7XXXF00E199 | 16-BIT, 90 MHz, RISC MICROCONTROLLER, PQFP |
| S2041 | PHOTO TRANSISTOR DETECTOR |
| S3P44R10 | TRIGGER OUTPUT SOLID STATE RELAY, 4000 V ISOLATION-MAX |
| S3S12P128J0VQK | 16-BIT, MROM, 1.05 MHz, MICROCONTROLLER, PQFP80 |
| MC9S12P128J0CFTR | 16-BIT, FLASH, 1.05 MHz, MICROCONTROLLER, QCC48 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S1C63408 | 制造商:EPSON 制造商全稱:EPSON 功能描述:4-bit Single Chip Microcomputer |
| S1C63557D04Q000 | 制造商:Seiko Instruments Inc (SII) 功能描述:EPSON MCU 4BIT |
| S1C63567 | 制造商:EPSON 制造商全稱:EPSON 功能描述:4-bit Single Chip Microcomputer |
| S1C63616 | 制造商:EPSON 制造商全稱:EPSON 功能描述:4-bit Single Chip Microcomputer |
| S1C63632 | 制造商:EPSON 制造商全稱:EPSON 功能描述:4-bit Single Chip Microcomputer |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。