參數(shù)資料
型號: S1C63158D0A010P
元件分類: 微控制器/微處理器
英文描述: 4-BIT, FLASH, 4 MHz, MICROCONTROLLER, UUC53
封裝: DIE-53
文件頁數(shù): 10/159頁
文件大?。?/td> 1200K
代理商: S1C63158D0A010P
S1C63808 TECHNICAL MANUAL
EPSON
99
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Sound Generator)
4.11.4 Digital envelope
A digital envelope for duty control can be added to the buzzer signal.
The envelope can be controlled by staged changing of the same duty envelope as detailed in Table 4.11.3.2
in the preceding item from level 1 (maximum) to level 8 (minimum).
The addition of an envelope to the buzzer signal can be done by writing "1" into ENON, but when "0" has
been written it is not added.
When a buzzer signal output is begun (writing "1" into BZE) after setting ENON, the duty ratio shifts to
level 1 (maximum) and changes in stages to level 8.
When attenuated down to level 8 (minimum), it is retained at that level. The duty ratio can be returned to
maximum, by writing "1" into register ENRST during output of a envelope attached buzzer signal.
The envelope attenuation time (time for changing of the duty ratio) can be selected by the register
ENRTM. The time for a 1 stage level change is 62.5 msec (16 Hz), when "0" has been written into ENRTM
and 125 msec (8 Hz), when to "1" has been written. However, there is also a max. 4 msec error from
envelope ON, up to the first change.
Figure 4.11.4.1 shows the timing chart of the digital envelope.
BZFQ0–2
ENON
ENRST
ENRTM
BZE
t01
t02
t03
t04
t05
t06
t07
t01
t11
t12
t13
t14
t15
t16
t17
Level 1 (Max.)
2
3
4
5
6
7
8 (Min.)
BZ signal
duty ratio
No change of duty level
t01
t02–07
= 62.5
msec
= 62.5 msec
+0
–4
t11
t12–17
= 125
msec
= 125 msec
+0
–4
Fig. 4.11.4.1 Timing chart for digital envelope
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