參數(shù)資料
型號(hào)： RTL8305SB
英文描述： RTL8305SB
中文描述： RTL8305SB
文件頁(yè)數(shù)： 30/66頁(yè)
文件大小： 963K
代理商： RTL8305SB
RTL8305SB
2002/04/09
30
Rev.1.0
6.5 PHY3: Port Control Register
6.5.1 Register16: Port Control Register
This register does not need a soft reset.
Reg.bit
Name
16.15
SoftReset
Description
Soft Reset:
1: Soft reset. This bit is self-clearing.
Disable Port4 Loopback:
1: Disable port4 loopback function for normal application
0: Enable port4 loopback function for diagnostic application
Disable Port3 Loopback:
1: Disable port3 loopback function for normal application
0: Enable port3 loopback function for diagnostic application
Disable Port2 Loopback:
1: Disable port2 loopback function for normal application
0: Enable port2 loopback function for diagnostic application
Disable Port1 Loopback:
1: Disable port1 loopback function for normal application
0: Enable port1 loopback function for diagnostic application
Disable Port0 Loopback:
1: Disable port0 loopback function for normal application
0: Enable port0 loopback function for diagnostic application
Enable Link of Port4:
1: Enable Port4’s PHY (UTP or FX) to provide the Link status
to MAC for normal operation
0: Disable Port4’s PHY (UTP or FX) to provide the Link
status to MAC. This port is linked fail for MAC, but PHY still
work normally.
Mode
RW/SC
Default
0
16.14~16.10
Reserved
16.9
RO
RW
1
1
DisP4LoopBack
16.8
DisP3LoopBack
RW
1
16.7
DisP2LoopBack
RW
1
16.6
DisP1LoopBack
RW
1
16.5
DisP0LoopBack
RW
1
16.4
EnPort4
The link status of MII MAC/MII PHY/SNI PHY is determined
by P4LNKSTA pin.
Enable Link of Port3:
1: Enable Port3’s PHY (UTP or FX) to provide the Link status
to MAC for normal operation.
0: Disable Port3’s PHY (UTP or FX) to provide the Link
status to MAC. This port is linked fail for MAC, but PHY still
work normally.
Enable Link of Port2:
1: Enable Port2’s PHY (UTP or FX) to provide the Link status
to MAC for normal operation.
0: Disable Port2’s PHY (UTP or FX) to provide the Link
status to MAC. This port is linked fail for MAC, but PHY still
work normally.
Enable Link of Port1:
1: Enable Port1’s PHY (UTP or FX) to provide the Link status
to MAC for normal operation.
0: Disable Port1’s PHY (UTP or FX) to provide the Link
status to MAC. This port is linked fail for MAC, but PHY still
work normally.
Enable Link of Port0:
1: Enable Port0’s PHY (UTP or FX) to provide the Link status
to MAC for normal operation.
0: Disable Port0’s PHY (UTP or FX) to provide the Link
status to MAC. This port is linked fail for MAC, but PHY still
work normally.
RW
1
16.3
EnPort3
RW
1
16.2
EnPort2
RW
1
16.1
EnPort1
RW
1
16.0
EnPort0
RW
1
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