參數(shù)資料
型號： RTL8305SB
英文描述： RTL8305SB
中文描述： RTL8305SB
文件頁數(shù)： 24/66頁
文件大小： 963K
代理商： RTL8305SB
6.1.4 Register5: Auto-Negotiation Link Partner Ability Register
Reg.bit
Name
Description
5.15
Next Page
1: Link partner desires Next Page transfer.
0: Link partner does not desire Next Page transfer.
5.14
Acknowledge
1: Link Partner acknowledges reception of FLP words.
0: Not acknowledged by Link Partner.
5.13
Remote Fault
1: Remote Fault indicated by Link Partner.
0: No remote fault indicated by Link Partner.
5.[12:11]
Reserved
5.10
Pause
1: Flow control supported by Link Partner.
0: No flow control supported by Link Partner.
Note: this bit is read only when Reg0.12=1. This bit is
read/write when Reg0.12=0 for future use.
5.9
100Base-T4
1: 100Base-T4 supported by Link Partner.
0: 100Base-T4 not supported by Link Partner.
5.8
100Base-TX-FD
1: 100Base-TX full duplex supported by Link Partner.
0: 100Base-TX full duplex not supported by Link Partner.
RTL8305SB
2002/04/09
24
Rev.1.0
Mode
RO
Default
0
RO
0
RO
0
RO
RW
0
0
RO
0
For 100FX mode, this bit is set when Reg.0.8=1 or **Full =1
after link established.
When Nway disabled TX mode, this bit is set when
Reg.0.13=1,and Reg.0.8=1 after link established.
1: 100Base-TX half duplex supported by Link Partner.
0: 100Base-TX half duplex not supported by Link Partner.
RO
0
5.7
100Base-TX
For 100FX mode, this bit is set when Reg.0.8=0 or **Full = 0
after link established.
When Nway disabled, this bit is set when Reg.0.13=1,and
Reg.0.8=0 after link established.
1: 10Base-TX full duplex supported by Link Partner.
0: 10Base-TX full duplex not supported by Link Partner.
RO
0
5.6
10Base-T-FD
When Nway disabled, this bit is set when Reg.0.13=0,and
Reg.0.8=1 after link established.
1: 10Base-TX half duplex supported by Link Partner.
0: 10Base-TX half duplex not supported by Link Partner.
When Nway disabled, this bit is set when Reg.0.13=0,and
RO
0
5.5
10Base-T
Reg.0.8=0. after link established
[00001]=IEEE802.3
RO
0
5.[4:0]
6.1.5 Register6: Auto-Negotiation Expansion Register
Selector Field
RO
00001
Reg.bit
6.[15:5]
6.4
Name
Reserved
Parallel Detection
Fault
Link Partner Next
Page Able
Local Next Page
Able
Page Received
Description
1: A fault has been detected via the Parallel Detection function.
0: A fault has not been detected via the Parallel Detection function.
1: Link Partner is Next Page able.
0: Link Partner is not Next Page able. (permanently=0)
1: RTL8305SB is Next Page able.
0: RTL8305SB is not Next Page able.
1: A New Page has been received.
0: A New Page has not been received.
If Nway is enabled, this bit means:
1: Link Partner is Auto-Negotiation able.
0: Link Partner is not Auto-Negotiation able.
Mode
RO
RO
Default
0
0
6.3
RO
0
6.2
RO
0
6.1
RO
0
6.0
Link Partner Auto-
Negotiation Able
In 100FX or Nway disabled, this bit always =1.
RO
0
(Nway)
or
1
(Force)
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