
RTL8305SB 
2002/04/09 
13
Rev.1.0
SEL_MIIMAC#/  
DisDSPri 
68 
I/O 
Output after reset = SEL_MIIMAC# used for LED: 
When P4MODE[1:0]=11, this pin indicates whether the UTP path or the 
MII MAC path is selected. Otherwise, this pin is of no use. 
The LED statuses are represented as active-low or high depending on 
input strapping.  
 => If Input=1: Output 0= MII MAC port is selected. 1= UTP is selected. 
 => If Input=0: Output 1= MII MAC port is selected. 0= UTP is selected. 
While P4MODE[1:0]=11, RTL8305S supports UTP/MII MAC 
auto-detection function via the link status of Port4 UTP and the status of 
pin P4LNKSTA# and MAC mode MII. UTP has higher priority over the 
MAC mode MII. 
Input upon reset = DisDSPri. Disable Differentiated Service Priority.  
1: Disable DS priority;  0: Enable DS priority
8305SB = SEL_MIIMAC#/DisDSPri, 8305S = SEL_MIIMAC#.
1 
5.4 Miscellaneous Pins 
 Pin Name 
X1 
X2 
CK25MOUT 
Pin No. Type 
44 
45 
71 
  Description 
25MHz crystal or oscillator clock input. The clock tolerance is +-50ppm. 
To crystal input, when using an oscillator, this pin should be floating. 
25MHz clock output. The source of this output is clock from X1 and X2. 
This pin is used to support an extra 25M clock for the external device 
(for example: HomePNA PHY).  
The output voltage of the RTL8305SB is 2.5V. The output voltage of the 
RTL8305S is 3.3V. 
Active low reset signal:
 To complete reset function, this pin must be 
asserted for at least 10ms. After reset, about 30ms is needed for the 
RTL8305SB to complete internal test functions and initialization. 
This pin is a Schmitt input. 
Because this pin can be connected to a 2.5V or 3.3V device, this pin has 
no internal pull-high resistor.  
Control transmit output waveform Vpp: 
This pin should be grounded 
through a 1.96K
 resistor. 
Voltage control to external regulator:
 This signal controls a power 
PNP transistor to generate the 2.5V power supply. 
8305SB = VCtrl, 8305S = TEST#. 
Cap+ for future use:
 Reserve capacitors in layout for future use, but do 
not use those capacitors in the BOM. 
8305SB = RTT3, 8305S = TESTCLK. 
Cap- for future use:
 Reserve capacitors in layout for future use, but do 
not use those capacitors in the BOM. 
8305SB = RTT2, 8305S = TESTDATA. 
Reserved pin for internal use. Should be left floating.  
Default  
I 
O 
O 
RESET# 
40 
I 
IBREF 
124 
A 
VCtrl 
121 
O 
RTT3 
41 
O 
RTT2 
42 
O 
TEST# 
101 
I/O 
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