參數(shù)資料
型號: RG82870P2
英文描述: Controller Miscellaneous - Datasheet Reference
中文描述: 控制器雜項-數(shù)據(jù)表參考
文件頁數(shù): 33/157頁
文件大?。?/td> 1407K
代理商: RG82870P2
Intel
82845MP/82845MZ Chipset-Mobile (MCH-M)
128
Datasheet
250687-002
R
7.
Signal Groups
The signal description includes the type of buffer used for the particular signal.
AGTL+
Open Drain AGTL+ interface signal. Refer to the AGTL+ I/O Specification for complete
details. The Intel 845MP/845MZ Chipset MCH-M integrates most AGTL+ termination
resistors.
AGP
AGP interface signals. These signals are compatible with AGP 2.0 1.5 V Signaling
Environment DC and AC Specifications. The buffers are not 3.3 V tolerant.
HI CMOS
Hub Interface 1.8 V CMOS buffers.
DDR CMOS DDR System memory 2.5 V CMOS buffers.
Table 37. Signal Groups
Signal Group
Signal Type
Signals
Notes
Host Interface Signal Groups
(a)
AGTL+ I/O
ADS#, BNR#, BR0#,DBSY#, DBI[3:0]#, DRDY#,
HA[31:3]#, HADSTB[1:0] #,
HD[63:0]#,HDSTBP[3:0]#, HDSTBN[3:0]#, HIT#,
HITM#, HREQ[4:0]#
(b)
AGTL+ Common
Clock Output
BPRI#, CPURST#, DEFER#, HTRDY#, RS[2:0]#
(c)
AGTL+ Common
Clock Input
HLOCK#
(d)
Host Reference
Voltages
HVREF, HSWING[1:0]
AGP Interface Signal Groups
(e)
AGP I/O
AD_STB0, AD_STB0#, AD_STB1, AD_STB1#,
G_FRAME#, G_IRDY#, G_TRDY#, G_STOP#,
G_DEVSEL#, G_AD[31:0], G_CBE[3:0]#, G_PAR
(f)
AGP Input
PIPE#, SBA[7:0], RBF#, WBF#, SB_STB,
SB_STB#, G_REQ#
(g)
AGP Output
ST[2:0], G_GNT#
(h)
AGP Reference
Voltage
AGPREF
Hub Interface Signal Groups
(i)
Hub Interface’s
CMOS I/O
HI_[10:0], HI_STB, HI_STB#
(j)
Hub Interface
Reference
Voltage
HI_REF
DDR Interface Signal Groups
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