參數(shù)資料
型號: RG82845MP
英文描述: Controller Miscellaneous - Datasheet Reference
中文描述: 控制器雜項(xiàng)-數(shù)據(jù)表參考
文件頁數(shù): 150/157頁
文件大小: 1407K
代理商: RG82845MP
Intel
82845MP/82845MZ Chipset-Mobile (MCH-M)
92
Datasheet
250687-002
R
3.8.10.
PBUSN1 – Primary Bus Number Register – Device #1
Offset:
18h
Default:
00h
Access:
Read Only
Size:
8 bits
This register identifies that “virtual” PCI-PCI Bridge is connected to bus #0.
Bit
Descriptions
7:0
Bus Number. Hardwired to “0.”
3.8.11.
SBUSN1 – Secondary Bus Number Register – Device #1
Offset:
19h
Default:
00h
Access:
Read /Write
Size:
8 bits
This register identifies the bus number assigned to the second bus side of the “virtual” PCI-PCI bridge
i.e. to AGP. This number is programmed by the PCI configuration software to allow mapping of
configuration cycles to AGP.
Bit
Descriptions
7:0
Bus Number. Programmable. Default = “00h”.
3.8.12.
SUBUSN1 – Subordinate Bus Number Register – Device #1
Offset:
1Ah
Default:
00h
Access:
Read /Write
Size:
8 bits
This register identifies the subordinate bus (if any) that resides at the level below AGP. This number is
programmed by the PCI configuration software to allow mapping of configuration cycles to AGP.
Bit
Descriptions
7:0
Bus Number. Programmable. Default = “00h”.
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