參數(shù)資料
型號: RG82845MP
英文描述: Controller Miscellaneous - Datasheet Reference
中文描述: 控制器雜項-數(shù)據(jù)表參考
文件頁數(shù): 128/157頁
文件大?。?/td> 1407K
代理商: RG82845MP
Intel
82845MP/82845MZ Chipset-Mobile (MCH-M)
72
Datasheet
250687-002
R
3.7.26.
AGPSTAT – AGP Status Register – Device #0
Address Offset:
A4-A7h
Default Value:
1F00_0217h
Access:
Read Only
Size:
32 bits
This register reports AGP device capability/status.
Bit
Description
31:24
Request Queue (RQ): This field is hardwired to 1Fh to indicate a maximum of 32 outstanding AGP
command requests can be handled by the MCH-M. This field contains the maximum number of AGP
command requests the MCH-M is configured to manage.
Default =1Fh to allow a maximum of 32 outstanding AGP command requests.
23:10
Reserved
9
Side Band Addressing Support (SBA): This bit indicates that the MCH-M supports side band
addressing. It is hardwired to 1.
8:6
Reserved
5
Greater that 4 GB Support (4GB): This bit indicates that the MCH-M does not support addresses
greater than 4 gigabytes. It is hardwired to 0.
4
Fast Write Support (FW): This bit indicates that the MCH-M supports Fast Writes from the host to
the AGP master. It is hardwired to a 1.
3
Reserved
2:0
Data Rate Support (RATE): After reset the MCH-M reports its data transfer rate capability. Bit 0
identifies if MCH-M supports 1x data transfer mode, bit 1 identifies if MCH-M supports 2x data
transfer mode, and bit 2 identifies if MCH-M supports 4x data transfer mode. 1x, 2x, and 4x data
transfer modes are supported by the MCH-M and therefore this bit field has a Default Value = 111.
Note that the selected data transfer mode applies to both AD bus and SBA bus. It also applies to Fast
Writes if they are enabled.
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