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Rev. 1.00 Sep. 13, 2007 Page xxiii of xxviii
Section 18 A/D Converter....................................................................................773
18.1
Features............................................................................................................................. 773
18.2
Input/Output Pins.............................................................................................................. 777
18.3
Register Descriptions ........................................................................................................ 779
18.3.1
A/D Data Registers A to H (ADDRA to ADDRH) .......................................... 781
18.3.2
A/D Control/Status Register for Unit 0 (ADCSR_0)........................................ 782
18.3.3
A/D Control/Status Register for Unit 1 (ADCSR_1)........................................ 784
18.3.4
A/D Control/Status Register for Unit 2 (ADCSR_2)........................................ 786
18.3.5
A/D Control Register (ADCR_0) Unit 0 .......................................................... 788
18.3.6
A/D Control Register (ADCR_1) Unit 1 .......................................................... 790
18.3.7
A/D Control Register (ADCR_2) Unit 2 .......................................................... 792
18.4
Operation .......................................................................................................................... 794
18.4.1
Single Mode...................................................................................................... 794
18.4.2
Scan Mode ........................................................................................................ 795
18.4.3
Input Sampling and A/D Conversion Time ...................................................... 798
18.4.4
External Trigger Input Timing.......................................................................... 800
18.5
Interrupt Source ................................................................................................................801
18.6
A/D Conversion Accuracy Definitions ............................................................................. 803
18.7
Usage Notes ...................................................................................................................... 805
18.7.1
Module Stop Function Setting .......................................................................... 805
18.7.2
A/D Input Hold Function in Software Standby Mode ...................................... 805
18.7.3
Permissible Signal Source Impedance .............................................................. 805
18.7.4
Influences on Absolute Accuracy ..................................................................... 806
18.7.5
Setting Range of Analog Power Supply and Other Pins ................................... 806
18.7.6
Notes on Board Design ..................................................................................... 807
18.7.7
Notes on Noise Countermeasures ..................................................................... 807
Section 19 D/A Converter....................................................................................809
19.1
Features............................................................................................................................. 809
19.2
Input/Output Pins.............................................................................................................. 810
19.3
Register Descriptions ........................................................................................................ 810
19.3.1
D/A Data Registers 0 and 1 (DADR0 and DADR1)......................................... 810
19.3.2
D/A Control Register 01 (DACR01) ................................................................ 811
19.4
Operation .......................................................................................................................... 813
19.5
Usage Notes ...................................................................................................................... 814
19.5.1
Module Stop State Setting ................................................................................ 814
19.5.2
D/A Output Hold Function in Software Standby Mode.................................... 814
Section 20 RAM ..................................................................................................815