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| 型號(hào)： | QT0086302TME |
| 英文描述： | Controller Miscellaneous - Datasheet Reference |
| 中文描述： | 控制器雜項(xiàng)-數(shù)據(jù)表參考 |
| 文件頁數(shù)： | 51/62頁 |
| 文件大?。?/td> | 268K |
| 代理商： | QT0086302TME |
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82C814
912-3000-047
Revision: 1.0
Page 41
January 08, 1998
OPTi
5.6
PCI Power Management Register Group
the following registers comprise the PCI Power Management Register Group.
Window points
to ISA bus:
0 = No
1 = Yes
Reads are
prefetchable:
0 = No
1 = Yes
Set to 0 for I/O
window
Writes can be
posted:
0 = No
1 = Yes
Set to 0 for I/O
window
Reserved
Cycle
qualifier:
0 = I/O (Default)
1 = Memory
Window 3
Trap/SMI#:
0 = Disable
1 = Enable
Reserved
PCICFG BCh-EFh
Reserved
Default = 00h
Table 5-7
PCI Power Management Registers - PCICFG F0h-FFh
PCICFG F0h
Capabilities ID Register (RO)
Default = 01h
This register always returns 01h to identify the Linked List item as being the PCI Power Management Registers.
PCICFG F1h
Next Item Pointer Register (RO)
Default = 00h
Value of 0 indicates no additional items in Capabilities List
PCICFG F2h
Power Management Capabilities Register - Byte 0
Default = 01h
Reserved
Device Specific
Individualization
0 = No (always)
Reserved
Returns 001b to indicate Rev 1.0 of PCI Power
Management Specification
PCICFG F3h
Power Management Capabilities Register - Byte 1
Default = 06h
Reserved
Supports D2
Power Manage-
ment State
1 = Yes
(always)
Support D1
Power Manage-
ment State
1 = Yes
(always)
Reserved
PCICFG F4h
Power Management Control/Status Register - Byte 0
Default = 00h
Reserved
Power State
00 = State D0
01 = State D1
10 = State D2
11 = State D3hot
PCICFG F5h
Power Management Control/Status Register - Byte 1
Default = 00h
PME Status
0 = Inactive
1 = Active
Write 1 to clear
Data Register (not Implemented)
PME# PCI
Function
0 = Disable
1 = Enabled
Table 5-6
Docking Station Window Registers - PCICFG 80h-EFh (cont.)
7
6
5
4
3
2
1
0
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