參數(shù)資料
型號(hào)： QT0086302TME
英文描述： Controller Miscellaneous - Datasheet Reference
中文描述： 控制器雜項(xiàng)-數(shù)據(jù)表參考
文件頁(yè)數(shù)： 3/62頁(yè)
文件大小： 268K
代理商： QT0086302TME
82C814
Table of Contents
OPTi
912-3000-047
Revision: 1.0
Page iii
January 08, 1998
1.0
Features ............................................................................................................................ 1
2.0
Overview ........................................................................................................................... 1
3.0
Signal Definitions............................................................................................................. 2
3.1
Terminology/Nomenclature Conventions ........................................................................................2
3.2
Signal Descriptions ............................................................................................................................6
3.2.1
Host Interface PCI Signals .....................................................................................................6
3.2.2
Docking Control and Sense Signals.......................................................................................7
3.2.3
PCI Docking Interface Pins.....................................................................................................7
3.2.4
Interrupt Interface Pins ...........................................................................................................9
3.2.5
Power and Ground Pins .........................................................................................................9
3.3
Strap-Selected Interface Options....................................................................................................10
3.4
Internal Resistors .............................................................................................................................11
4.0
Functional Description .................................................................................................. 13
4.1
OPTi Docking Station Controller Chipset.......................................................................................13
4.2
Chipset Compatibility.......................................................................................................................13
4.3
Interface Overview............................................................................................................................13
4.4
Device Type Detection Logic...........................................................................................................14
4.5
Primary PCI Bus................................................................................................................................15
4.6
PCI-to-CardBus Bridge.....................................................................................................................15
4.6.1
Configuration Cycle ..............................................................................................................15
4.6.1.1
Translation Between Type 0 and Type 1 Configuration Cycles............................15
4.6.2
Cycle from Host to Docking Interface...................................................................................16
4.6.3
Master Cycle from Docking Interface ...................................................................................16
4.6.4
Inability to Complete a Posted Write ....................................................................................16
4.6.5
Cycle Termination by Target ................................................................................................16
4.6.5.1
Posted Write Termination .....................................................................................16
4.6.5.2
Non-Posted Write Termination..............................................................................16
4.6.5.3
Read (Prefetched or Non-Prefetched) Termination ..............................................16
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