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參數(shù)資料
| 型號(hào)： | PM73121-RI |
| 廠商： | PMC-SIERRA INC |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | AAL1 Segmentation And Reassembly Processor |
| 中文描述： | ATM SEGMENTATION AND REASSEMBLY DEVICE, PQFP240 |
| 封裝： | QFP-240 |
| 文件頁(yè)數(shù)： | 92/223頁(yè) |
| 文件大?。?/td> | 2300K |
| 代理商： | PM73121-RI |
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PM73121AAL1gator II
PMC-Sierra, Inc.
L
PMC-980620
,VVXH
AAL1 SAR Processor
Data Sheet
35235,(7$5<$1'&21),'(17,$/7230&6,(55$,1&$1')25,76&86720(56,17(51$/86(
To operate at the specified maximum SYS_CLK rate of 38.88 MHz, the external buffers must be
of the Fast CMOS TTL (FCT) or Fast (F) family, or of comparable speed. These outputs must be
supplied directly to the external devices and no buffering of the signals is allowed. Refer to
Figure
108 on page 195
for an example of how to interface memory to the AAL1gator II. Also refer to
Table 26 on page 195
for recommended timing parameters.
The microprocessor accesses the device by means of the /PROC_CS, /PROC_RD, and /PROC_
WR lines. To perform a write cycle, the /PROC_CS and /PROC_WR lines are asserted. The
AAL1gator II then enables the address and data lines at the proper moments and, when complete,
the device signals the microprocessor with the /PROC_ACK line. To perform a read, the micro-
processor asserts /PROC_CS and /PROC_RD and waits for /PROC_ACK before reading the data.
To prevent the microprocessor from obtaining too many memory cycles and interfering with nor-
mal AAL1gator II activity, a holdoff circuit is used. This circuit denies the microprocessor an
additional access until 20 SYS_CLK cycles have expired since the last microprocessor access.
The HOLDOFF output is asserted whenever this denial period is in effect. The microprocessor
can poll this output to determine when it will be allowed an access that is not subjected to HOLD-
OFF. See timing diagrams starting with
Figure 55 on page 92
. Refer to
section 8 “Application
Notes” starting on page 168
for a block diagram of the interface.
3.9
To transfer TDM data into cells or to transfer cells into TDM data, the PM73121 and each line
needs to be configured, and the queues need to be configured and added to determine how the data
should be mapped.
Configuration
To configure the AAL1gator II and each line, initialize the COMP_LIN_REG and the LIN_STR_
MODE register for each line. To have these values take affect, the CMD_ATTN bit must be set
and the SW_RESET bit in the CMDREG must be cleared. Since no queues are defined at this
time, all timeslots in the R_CH_TD_QUEUE_TBL should be initialized to play out conditioned
data and the R_COND_DATA field for each timeslot should be initialized to the desired play out
value. If signaling is used, then R_COND_SIG should also be initialized.
Once the line is configured, queues can be added as described in
section 7.11 “Activating a New
Queue on an Active Line” on page 167
.
相關(guān)PDF資料 |
PDF描述 |
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| PM73122 | 32 LINK CES/DBCES AAL1 SAR PROCESSOR |
| PM73122-BI | 32 LINK CES/DBCES AAL1 SAR PROCESSOR |
| PM73123 | 8 LINK CES/DBCES AAL1 SAR |
| PM73123-PI | 8 LINK CES/DBCES AAL1 SAR |
| PM73124 | 4 Link CES/DBCES AAL1 SAR |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PM73122 | 制造商:PMC 制造商全稱:PMC 功能描述:32 LINK CES/DBCES AAL1 SAR PROCESSOR |
| PM73122-BI | 制造商:PMC 制造商全稱:PMC 功能描述:32 LINK CES/DBCES AAL1 SAR PROCESSOR |
| PM73122-BIP | 制造商:PMC-Sierra 功能描述:AAL1GATOR32 EOL270906 |
| PM73122-BI-P | 制造商:PMC-Sierra 功能描述: |
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