參數(shù)資料
型號(hào): PD6710
廠商: Intel Corp.
英文描述: ISA-to-PC-Card (PCMCIA) Controllers
中文描述: ISA -到- PC卡(PCMCIA)的控制器
文件頁(yè)數(shù): 52/138頁(yè)
文件大小: 723K
代理商: PD6710
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PD6710/
22
ISA-to-PC-Card (PCMCIA) Controllers
52
Datasheet
Bit 5
Card Is I/O
This bit determines how dual-function socket interface pins will be used.
Bit 6
Card Reset*
This bit determines whether the RESET signal (see
Table 2 on page 20
) to the card is active or
inactive. When the Card Enable bit (see
Bit 7
Card Enable
on page 50
) is
0
, the RESET
signal to the card will be high-impedance. See Chapter 10 for further description of ATA mode
functions.
Bit 7
Ring Indicate Enable
This bit determines whether the -STSCHG input pin is used to activate the IRQ15 pin in
conjunction with
Misc Control 2
, IRQ15 Is RI Out (see
Bit 7
IRQ15 Is RI Out
on page 74
).
This bit has no significance when the card socket is configured for memory card operation.
7.5
Card Status Change
This register indicates the source of a management interrupt generated by the PD67XX.
Note:
The corresponding bit in the
Management Interrupt Configuration
register must be set to
1
to
enable each specific status change detection.
0
Memory Card Interface mode: card socket configured to support memory cards. Dual-function
socket interface pins perform memory card-type interface functions.
1
I/O Card Interface mode: card socket configured to support I/O/memory card-type interface
functions. Dual-function socket interface pins perform I/O/memory card-type interface functions.
0
The RESET signal to the card socket is set active (high for normal, low for ATA mode).
1
The RESET signal to the card socket is set inactive (low for normal, high for ATA mode).
0
BVD1/-STSCHG pin is status change function.
1
BVD1/-STSCHG pin is ring indicate input pin from card.
Register Name: Card Status Change
Index: 04h
Register Per:
socket
Register Compatibility Type: 365
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Card Detect
Change
Ready
Change
Battery
Warning
Change
Battery Dead
Or Status
Change
R:0
R:0
R:0
R:0
R:0
R:0
R:0
R:0
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