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參數(shù)資料
| 型號(hào)： | PD6710 |
| 廠商： | Intel Corp. |
| 英文描述： | ISA-to-PC-Card (PCMCIA) Controllers |
| 中文描述： | ISA -到- PC卡（PCMCIA）的控制器 |
| 文件頁(yè)數(shù)： | 17/138頁(yè) |
| 文件大?。?/td> | 723K |
| 代理商： | PD6710 |
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ISA-to-PC-Card (PCMCIA) Controllers
—
PD6710/
’
22
Datasheet
17
MEMR*
Memory Read
: This input indicates that a
host memory read cycle is occurring.
Connect to ISA signal MEMR*.
83
145
1
I
4
–
MEMW*
Memory Write
: This input indicates that a
host memory write cycle is occurring.
Connect to ISA signal MEMW*.
82
144
1
I
4
–
REFRESH*
Refresh
: This input indicates a memory
refresh cycle is occurring and will cause the
PD67XX to ignore memory accesses on the
bus. Connect to ISA signal REFRESH*.
119
180
1
I
4
–
ALE
Address Latch Enable
: A high on this input
indicates a valid memory address on the
LA[23:17] bus lines. Connect to ISA signal
BALE.
105
166
1
I
4
–
PWRGOOD
Power Good
: The PD67XX will be reset
when the POWERGOOD input is low.
Connect to the POWERGOOD signal from
the system power supply; or, if not available,
connect to inverted RESETDRV signal from
ISA bus.
141
201
1
I
4
–
AEN
Address Enable
: This is an input from the
host CPU bus signal that distinguishes
between DMA and non-DMA bus cycles.
This input should be high for a DMA cycle
and will cause the PD67XX to ignore IOR*
and IOW* except when a PD6722 is
configured for DMA and its DREQ (IRQ10)
and DACK* (IRQ9) signals are active.
Connect to ISA signal AEN.
When PD67XX is in Suspend mode (see
“
Misc Control 2
”
on page 72
), pull this input
high during system power-down for lowest
power consumption.
126
187
1
I
4
–
MEMCS16*
Memory Select 16
: This output is an
acknowledge of 16-bit-wide access support
and is generated by the PD67XX when a
valid 16-bit-word-accessible memory
address has been decoded. Connect to ISA
signal MEMCS16*.
99
160
1
O-OD
4
16 mA
IOCS16*
I/O Select 16
: This output is an
acknowledge for 16-bit-wide access support
and is generated by the PD67XX when a
valid 16-bit word accessible I/O address has
been decoded. Connect to ISA signal
IOCS16*.
97
158
1
O-OD
4
16 mA
IOCHRDY
I/O Channel Ready
: This output is driven
low by the PD67XX to lengthen host cycles.
Connect to the ISA bus IOCHRDY signal.
127
188
1
O-TS
4
16 mA
Table 1. ISA Bus Interface Pins
(Sheet 2 of 4)
Pin Name
Description
Pin Number
Qty.
I/O
Pwr.
Drive
PD6710
PD6722
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