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參數(shù)資料
| 型號： | P95020ZLLG |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 電源管理 |
| 英文描述： | 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, PBGA124 |
| 封裝： | LLGA-124 |
| 文件頁數(shù)： | 86/137頁 |
| 文件大?。?/td> | 3533K |
| 代理商： | P95020ZLLG |
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P95020 / Preliminary Datasheet
Revision 0.7.10
52
2010 Integrated Device Technology, Inc.
3.0 CHARGER MODULE
Battery Charger, including switching buck regulator, charger, ideal diode and precision reference
CHARGER FEATURES
High Efficiency Switch Mode Pre-Regulator for System
Power (VSYS)
Programmable USB or Wall current limit
(100mA/500mA/1A/1.5A/2A)
Low Headroom Linear Charger
1.5A Maximum Charge Current
Internal 180m
Ideal Diode + External Ideal Diode
Automatic load prioritization
Independent Die-Temperature Sensor for Charger
Battery Temperature Monitor
Optional Discharger for Battery Safety
Independent Precision Bandgap Reference
Battery Voltage Monitor
Power-On Reset Circuit
CHARGER DESCRIPTION
The CHARGER module is the input power manager for
the P95020. It consists of the switch-mode Battery
Charger, a Precision Reference and an Ideal Diode. It
also generates the VSYS power-on-reset when the system
is powered up or when a battery or power adapter is
attached.
The CHARGER consists of three power sources:
VBUS: Wall Adapter or USB provided power
VBAT: Battery on VBAT will either deliver power to VSYS
through the ideal diode or be charged from VSYS via the
charger.
VSYS: Output voltage of the Switch Mode Pre-Regulator
and Input Voltage of the Battery Charger.
Ref_Gnd
clk1k
POR
Pre-Regulator:
Buck + UVLO
Linear Charger,
Safety Discharger,
Ideal Diode &
Control
SW
VBAT
NTC
Die Temperature
Sensor
Precision
Reference
Power-On
Reset
Register
Interface
Battery
Temperature
Sensor
Battery Voltage
Monitor
VNTC
Battery
Pack
ILIM / CLSEN
ICHRG
VBUS INPUT
VSYS
PGND
102
103
104
105
106
107
108
109
115
116
113
112
110
111
P
A
Figure 9
– Charger Block Diagram
3.1
CHARGER - OVERVIEW
The Charger operation is hardware autonomous with software redundancy and configuration. On powerup it is configured
for a generic charging algorithm by default, however this is mask defined. Input current limiting selection is set by current
limit configuration register on powerup. After powerup the current limit can be set by GPIO4/CHRG_ILIM (write INT_ILIM
of Current Limit Configuration Register to 0), low stands for 500mA current limit while high stands for 1.5A current limit.
The GPIO pin configuration is defined in the GPIO_TSC Module and the Current Limit Configuration is defined in the
CHARGER MODULE. Both Charger and GPIO_TSC settings must be consistent to ensure that the P95020 works
properly. For example, if the charger registers are programmed such that current limiting is set via an external pin then
that GPIO must also be properly set in the GPIO_TSC registers to prevent it from being assigned to other functions.
3.2
CHARGER
– SUB-BLOCKS
The CHARGER block includes the following sub- blocks:
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