參數(shù)資料
型號： P95020ZLLG
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： 電源管理
英文描述： 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, PBGA124
封裝： LLGA-124
文件頁數(shù)： 48/137頁
文件大小： 3533K
代理商： P95020ZLLG
P95020 / Preliminary Datasheet
Revision 0.7.10
18
2010 Integrated Device Technology, Inc.
1.0 OVERVIEW
The P95020 is an integrated device that combines a microcontroller, power management, battery charging, touch screen
controller, system monitoring, clock synthesis, real time clock and audio functionality. All of these subsystems are
configured, monitored and controlled by either the on-chip Microcontroller or by an external controller (Application
Processor) over an IC interface. The external Application Processor can monitor and control functions within P95020
even when the internal Microcontroller is enabled. The registers for the various sub functions allow access from more
than one controller through an arbitration mechanism implemented in hardware.
LDO 150 mA
(0.75v-3.7V)
LDO 150 mA
(0.75v-3.7V)
LDO 50 mA
(0.75v-3.7V)
Battery
Charger
PWM
Charger
or
Discharger
VBUS
VSYS
SW
VBAT
GATE
External
PMOS
Ideal Diode
(Optional)
Ideal
Diode
0V
Single Cell
Li-Ion Battery
(From USB VBUS
or wall adpapter)
L
LDO 150 mA
(0.75v-3.7V)
LDO 50 mA
(0.75v-3.7V)
LDO 50 mA
(0.75v-3.7V)
LDO 50 mA
(0.75v-3.7V)
LDO 1mA (3.0V
or 3.3V)
DC-DC Buck
1000 mA
DC-DC Buck_1
500 mA
DC-DC Buck_0
500 mA
Micro-
controller
I
2C Master
I
2C Slave
Real Time
Clock
ADC/Touch
10 GPIO
POR_OUT
Hot Swap
Switches
Audio Codec
Headphone
Amp
Class-D
Amp
5V Boost
M
U
X
BOOST_LED
Backlight Driver &
Current Sinks for
LEDs
Voltage to LEDs
VSENSE
SINK 1
SINK 2
LDO_IN1
V_Output
LDO_IN2
Class-D Out
Mic In
Line In
I
2S Channel 1 In
I
2S Channel 2 In
Headphone Out
Line Out
I
2S Channel 2 Out
I
2S Channel 1 Out
HSCTRL1
HSO1
HSCTRL2
HSO2
10 pin
interface
SDA
SCL
SDA
SCL
NTC
VNTC
ICHRG
Oscillator
Power
On
Reset
V_Output
VIN
VSYS to System
+
ISENSE
HSPWR
CLSEN
USB_CLK
SYS_CLK
TCXO_OUT
Clock
Generator
SW_DET
POR_OUT
Figure 4
– Overall System Functional Diagram.
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