參數(shù)資料
型號： P95020ZLLG
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： 電源管理
英文描述： 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, PBGA124
封裝： LLGA-124
文件頁數(shù)： 80/137頁
文件大?。?/td> 3533K
代理商： P95020ZLLG
P95020 / Preliminary Datasheet
Revision 0.7.10
47
2010 Integrated Device Technology, Inc.
AGCSET3 = IC Address = Page-1: 190(0xBE), C Address = 0xA1BE
Bit
Bit Name
Def.
Set.
User
Type
Value
Description / Comments
[5:0]
THRESHOLD
000000b RW
000000b = -24 dB
100000b = -72 dB
-72 dB ~ -24 dB, in 1.5 dB per step
6
AGCEN_RIGHT
0b
RW
0 = Disable
1 = Enable
Right Channel AGC Enable
7
AGCEN_LEFT
0b
RW
0 = Disable
1 = Enable
Left Channel AGC Enable
AGCSET4 = IC Address = Page-1: 191(0xBF), C Address = 0xA1BF
Bit
Bit Name
Def.
Set.
User
Type
Value
Description / Comments
[4:0]
MIN_GAIN
00000b
RW
00000b = 0 dB
10100b = 30 dB
0 ~ 30 dB, 1.5 dB per step
[7:5]
BASETIME_CTRL
_MAG
000b
RW
000 = a, 001 = 2a, 010 =
4a, 011 = 8a, 101 = a/2,
110 = a/4, 111 = a/8
AGC basetime unit. a = 1/(8 x 44100) second
AGC5_MISC = IC Address = Page-1: 192(0xC0), C Address = 0xA1C0
Bit
Bit Name
Def.
Set.
User
Type
Value
Description / Comments
0
FASTEST_ATTACK
_DIS
0b
RW
0 = Not Disabled
1 = Disabled
Disable fastest attack when >85% peak
[7:1]
RESERVED
0000000b
RW
RESERVED
2.15.21 AUDIO - DAC0/1 Control Register Set
DAC_CTRL = IC Address = Page-1: 193(0xC1), C Address = 0xA1C1
Bit
Bit Name
Def.
Set.
User
Type
Value
Description / Comments
[7:0]
RESERVED
00h
RW
RESERVED
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