參數(shù)資料
型號(hào)： P95020ZLLG
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： 電源管理
英文描述： 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, PBGA124
封裝： LLGA-124
文件頁數(shù)： 71/137頁
文件大小： 3533K
代理商： P95020ZLLG
P95020 / Preliminary Datasheet
Revision 0.7.10
39
2010 Integrated Device Technology, Inc.
2.14
AUDIO CLASS_D - EQUALIZER COEFFICIENT & PRESCALER RAM (EQRAM)
2.14.1 AUDIO CLASS_D - Writing to EQRAM
The EQRAM is a single port 52x24 synchronous RAM. It is programmed indirectly through the Control Bus in the
following manner:
Write 24-bit signed/magnitude data to the EQWRITE_DATA register.
Write target address to the EQ_ADDR register (See Section 2.13.19).
Set bit 15 of the EQCONTROL register (just write 0x80 to EQCONTROL_HI register.) When the hardware completes
the write it will automatically clear this bit. The write will occur when the EQRAM is not being accessed by the DSP
audio processing routines. NOTE: Bit 10 of the EQCONTROL register must be 0 for proper write cycle.
2.14.2 AUDIO CLASS_D - Reading from EQRAM
Reading back a value from the EQRAM is done in this manner:
Write target address to EQ_ADDR register.
Set bit 14 of EQCONTROL register (just write 0x40 to EQCONTROL_HI.) When the hardware completes the read it will
automatically clear this bit. The read data can then be read from the EQREAD_DATA register.
Table 7 - EQRAM Addresses
Channel 0 Coefficients
Filter
Band
Channel 1 Coefficients
Address
Offset
Data Hi
[23:16]
Data Mid
[15:08]
Data Lo
[07:00]
Address
Offset
Data Hi
[23:16]
Data Mid
[15:08]
Data Lo
[07:00]
0x00
EQ_F0_A1C
EQ_F0_A1B
EQ_F0_A1A
0
0x19
EQ_F0_A1C
EQ_F0_A1B
EQ_F0_A1A
0x01
EQ_F0_A2C
EQ_F0_A2B
EQ_F0_A2A
0x1A
EQ_F0_A2C
EQ_F0_A2B
EQ_F0_A2A
0x02
EQ_F0_B0C
EQ_F0_B0B
EQ_F0_B0A
0x1B
EQ_F0_B0C
EQ_F0_B0B
EQ_F0_B0A
0x03
EQ_F0_B1C
EQ_F0_B1B
EQ_F0_B1A
0x1C
EQ_F0_B1C
EQ_F0_B1B
EQ_F0_B1A
0x04
EQ_F0_B2C
EQ_F0_B2B
EQ_F0_B2A
0x1D
EQ_F0_B2C
EQ_F0_B2B
EQ_F0_B2A
0x05
EQ_F1_A1C
EQ_F1_A1B
EQ_F1_A1A
1
0x1E
EQ_F1_A1C
EQ_F1_A1B
EQ_F1_A1A
0x06
EQ_F1_A2C
EQ_F1_A2B
EQ_F1_A2A
0x1F
EQ_F1_A2C
EQ_F1_A2B
EQ_F1_A2A
0x07
EQ_F1_B0C
EQ_F1_B0B
EQ_F1_B0A
0x20
EQ_F1_B0C
EQ_F1_B0B
EQ_F1_B0A
0x08
EQ_F1_B1C
EQ_F1_B1B
EQ_F1_B1A
0x21
EQ_F1_B1C
EQ_F1_B1B
EQ_F1_B1A
0x09
EQ_F1_B2C
EQ_F1_B2B
EQ_F1_B2A
0x22
EQ_F1_B2C
EQ_F1_B2B
EQ_F1_B2A
0x0A
EQ_F2_A1C
EQ_F2_A1B
EQ_F2_A1A
2
0x23
EQ_F2_A1C
EQ_F2_A1B
EQ_F2_A1A
0x0B
EQ_F2_A2C
EQ_F2_A2B
EQ_F2_A2A
0x24
EQ_F2_A2C
EQ_F2_A2B
EQ_F2_A2A
0x0C
EQ_F2_B0C
EQ_F2_B0B
EQ_F2_B0A
0x25
EQ_F2_B0C
EQ_F2_B0B
EQ_F2_B0A
0x0D
EQ_F2_B1C
EQ_F2_B1B
EQ_F2_B1A
0x26
EQ_F2_B1C
EQ_F2_B1B
EQ_F2_B1A
0x0E
EQ_F2_B2C
EQ_F2_B2B
EQ_F2_B2A
0x27
EQ_F2_B2C
EQ_F2_B2B
EQ_F2_B2A
0x0F
EQ_F3_A1C
EQ_F3_A1B
EQ_F3_A1A
3
0x28
EQ_F3_A1C
EQ_F3_A1B
EQ_F3_A1A
0x10
EQ_F3_A2C
EQ_F3_A2B
EQ_F3_A2A
0x29
EQ_F3_A2C
EQ_F3_A2B
EQ_F3_A2A
0x11
EQ_F3_B0C
EQ_F3_B0B
EQ_F3_B0A
0x2A
EQ_F3_B0C
EQ_F3_B0B
EQ_F3_B0A
0x12
EQ_F3_B1C
EQ_F3_B1B
EQ_F3_B1A
0x2B
EQ_F3_B1C
EQ_F3_B1B
EQ_F3_B1A
0x13
EQ_F3_B2C
EQ_F3_B2B
EQ_F3_B2A
0x2C
EQ_F3_B2C
EQ_F3_B2B
EQ_F3_B2A
0x14
EQ_F4_A1C
EQ_F4_A1B
EQ_F4_A1A
4
0x2D
EQ_F4_A1C
EQ_F4_A1B
EQ_F4_A1A
0x15
EQ_F4_A2C
EQ_F4_A2B
EQ_F4_A2A
0x2E
EQ_F4_A2C
EQ_F4_A2B
EQ_F4_A2A
0x16
EQ_F4_B0C
EQ_F4_B0B
EQ_F4_B0A
0x2F
EQ_F4_B0C
EQ_F4_B0B
EQ_F4_B0A
0x17
EQ_F4_B1C
EQ_F4_B1B
EQ_F4_B1A
0x30
EQ_F4_B1C
EQ_F4_B1B
EQ_F4_B1A
0x18
EQ_F4_B2C
EQ_F4_B2B
EQ_F4_B2A
0x31
EQ_F4_B2C
EQ_F4_B2B
EQ_F4_B2A
0x32
EQ_PREC
EQ_PREB
EQ_PREA
0x33
EQ_PREC
EQ_PREB
EQ_PREA
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