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| 型號(hào)： | P95020ZLLG |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 電源管理 |
| 英文描述： | 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, PBGA124 |
| 封裝： | LLGA-124 |
| 文件頁(yè)數(shù)： | 38/137頁(yè) |
| 文件大?。?/td> | 3533K |
| 代理商： | P95020ZLLG |
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P95020 / Preliminary Datasheet
Revision 0.7.10
132
2010 Integrated Device Technology, Inc.
17.5 PERIPHERALS
The peripherals of the subsystem are comprised of a timer, an interrupt controller and an IC master. The embedded
processors peripherals are not visible to the external application processor.
The IC master is used to optionally load data or code from an external serial EEPROM. The target EEPROM address is
hardwired to 1010000. The P95020 supports EEPROMs using 16-bit addressing in the range of 4 kB to 64KB.
17.6 INTERRUPT CONTROLLER
17.6.1
OVERVIEW
The interrupt controller is built in to the EMBUP core and is only used to monitor subsystem interrupts.
CHGR:
Charger
DCDC
LDO
CKGEN
I2CS_OTP
EMBUP
Embedded uP
subsystem, I
2C
Master
HSWP:
Hot swap
RTC
ACCM:
I
2C-Slave/Bus
Arbiter
PCON:
Power controller
AUDIO
TSCA
CLASSD_DIG
GPTIMER
TSCD: touch
screen digital
AP
Pendown
INT
FAULT
GPIO
GPIO_TSCA
pendown
Figure 36 - Top level Interrupt routing
17.6.2
INTERRUPT HANDLING SCHEME
Each of the different functional modules may generate interrupts and these interrupts can be enabled or disabled using
their associated interrupt enable registers. The generated interrupts may also be handled by either the internal
microcontroller or an external processor. The interrupts generated from the functional modules are routed to the access
manager (ACCM) module. The ACCM module will direct the interrupts to the appropriate processor (internal or external)
according to the configurable defined in the ACCM Register.
Please note that there is no hardware level protection in to prevent interrupts that have been processed by one processor
from being cleared by the other other processor. Care must be taken in software to prevent this usage scenario.
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