參數(shù)資料
型號(hào)： P95020ZLLG8
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： 電源管理
英文描述： 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, PBGA124
封裝： LLGA-124
文件頁數(shù)： 27/137頁
文件大?。?/td> 3533K
代理商： P95020ZLLG8
P95020 / Preliminary Datasheet
Revision 0.7.10
122
2010 Integrated Device Technology, Inc.
The following table lists the bit mapping for interrupt direction control and internal / external processor interrupt status
index register.
Table 30 - Interrupt Source Mapping
Byte
ID
Bit
Field
Mapping
0
RESERVED
1
GPIO1 (Pin 121)
2
GPIO2 (Pin 122)
3
GPIO3 (Pin 123)
4
GPIO4 (Pin 124)
5
GPIO5 (Pin 001)
6
GPIO6 (Pin 002)
7
GPIO7 (Pin 003)
1
0
GPIO8 (Pin 004)
1
GPIO9 (Pin 005)
2
GPIO10 (Pin 006)
3
RESERVED
4
Short_SW
5
RESERVED
6
Mid_SW
7
“Both” flag, only meaningful for interrupt direction control.
If this bit is set, interrupts will be dispatched to both internal and external processors.
2
0
WatchDog (Time-out)
1
GPTimer (Time-out)
2
RTC_Alarm1 (Time-out)
3
RTC_Alarm2 (Time-out)
4
LDO Fault -
A 1 indicates that one of the LDOs (Register 0xAx03, at least one of bits [7:0]) has faulted.
5
DCDC Fault
– A 1 indicates that one of the DC to DC Converters (Register 0xAx02, at least one of bits [3:0]) has faulted.
6
Charger (Adapter in/charging state change)
7
ClassD Fault
– The CLASS_D BTL Power Output has faulted. (Registers 0xA08B & 0xA08D, bit 4 must be set in both regs.)
3
0
Touch screen Pendown
1
Die temperature high (High temperature defined in A0E4h/A0E3h)
2
Battery voltage low
3
VSYS voltage low
4
ADC other interrupt except temperature high, battery low and VSYS low
5
Battery voltage extremely low (3.0V)
6
Die temperature extremely high (>155°C)
7
RESERVED
15.7.9
Global Register
– I2C_SLAVE_ADDR
IC Address = Page-x: 14(0x0E), C Address = 0xA00E
Bit
Bit Name
Def.
Set.
User
Type
Value
Description / Comments
0
RESERVED
0b
RW
RESERVED
[7:1]
IC_SLAVE_ADDR
0101010b
(2Ah)
RW
IC slave address (Default = 0b0101010)
15.7.10
Global Register
– I2C_CLOCK_STRETCH
IC Address = Page-x: 15(0x0F), C Address = 0xA00F
Bit
Bit Name
Def.
Set.
User
Type
Value
Description / Comments
0
STRETCH_EN
0b
RW
0 = Disabled
1 = Enabled
IC interface stretch function enable
1
CLK_GATE_EN
0b
RW
0 = Disabled
1 = Enabled
IC interface clock-gating (for low power) function enable
[7:2]
RESERVED
000000b
RW
RESERVED
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