參數(shù)資料
型號： P95020ZLLG8
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： 電源管理
英文描述： 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, PBGA124
封裝： LLGA-124
文件頁數(shù)： 131/137頁
文件大小： 3533K
代理商： P95020ZLLG8
P95020 / Preliminary Datasheet
Revision 0.7.10
93
2010 Integrated Device Technology, Inc.
11.0 CLASS_D BTL POWER OUTPUT STAGE
FEATURES
Single Supply, (+3.0 to 5.0V)
Controllable by host & registers
Short circuit protection
DESCRIPTION
The CLASS_D BTL Output is intended to be the Power
Stage for the CLASS_D audio amplifier.
It contains a
logic interface and two half-bridges that consist of
complementary FET output transistors with integrated
gate drivers. It has programmable short circuit protection.
When driven by the P95020
s CLASS_D Digital Logic, it is
capable of meeting standard EMI requirements when
operating in “filterless” (no L-C output filter) configuration.
11.1 CLASS_D - ELECTRICAL CHARACTERISTICS
Unless otherwise specified, typical values at TA =25C, VSYS = 3.8V, PVDD = 5V, TA = -40°C to +85°C, RL=8
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
Po
Output Power
PVDD = 5V, RL = 4Ω, THD+N = 10%)
2.5
W
AMP
Amplifier Efficiency
(4Ω, 5V, 2W)
PVDD = 5V, RL = 4Ω, 2W
82
%
THD+N
Total harmonic distortion + Noise
4Ω, 5V, 1W
PVDD driven by external
5V supply
0.4
%
8Ω, 5V, 1W
PVDD driven by external
5V supply
0.2
%
FPWM_AUDIO
PWM frequency
Note 1, Note 2
352.8
kHz
VNOISE
Output voltage noise
(4Ω, 5V)
90
V
IIDLE
Idle current (Mute, no load)
1
uA
PVDD
Input voltage
3.0
5.0
V
ISC
Short circuit protection current limit
2.0
A
IQ-PVDD
PVDD supply current (Power-Down)
Sum of currents
1
A
IQNL
PVDD supply current
Switching, No Load
6.0
mA
fPWM
PWM frequency
Note 1, Note 2
352.8
kHz
tr
Rise time
Resistive load
1
2
5
ns
tf
Fall time
Resistive load
1
2
5
ns
IQ
PVDD quiescent current
Mute, No load
3.6
mA
Notes:
1.
Guaranteed by design and/or characterization.
2.
Clock will be coming from external crystal through PLL. Resultant frequency will be within 1% range from the
nominal.
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