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參數(shù)資料
| 型號： | NT68P61A |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 8-Bit Microcontroller for Monitor (24K OTP ROM Type) |
| 中文描述： | 8位微控制器的監(jiān)視器（足金檢察官辦公室光盤形式） |
| 文件頁數(shù)： | 22/48頁 |
| 文件大?。?/td> | 1057K |
| 代理商： | NT68P61A |
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NT68P61A
22
12. I/O PORTs
NT68P61A has 25 pins dedicated to input and output.
These pins are grouped into 4 ports .
12.1. Port0: P00 - P07
Port0 is an 8-bit bi-directional CMOS I/O port with PMOS
as internal pull-up (Figure 6). Each pin of Port0 may be
bit programmed as an input or output port without the
software controlling the data direction register. When
Port0 works as output, the data to be output is latched to
the port data register and output to the pin. Port0 pins
that have '1's written to them are pulled high by the
internal PMOS pull-ups. In this state they can be used as
input, then the input signal can be read. This port outputs
high after reset .
P00 - P05 are shared with DAC8 - DAC13 respectively. If
user sets
ENDK8
-
ENDK13
LOW in ENDAC register,
P00 - P05 will act as DAC8 - DAC13 respectively
(Figure 7). After the chip is reset,
ENDK
-
ENDK13
will
enter HIGH state and P00 - P05s will act as I/O ports.
P06, P07 are shared with VSYNCO & HSYNCO
respectively. If user sets
ENH
,
ENV
to low in SYNCON
register, P06, P07 will act as VSYNCO & HSYNCO
respectively (Figure 8). After the chip is reset,
ENH
,
ENV
, will enter high state and P06, BP07 will act as I/O
pins.
Addr.
Register
INIT
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
$0000
PT0
FFH
P07
P06
P05
P04
P03
P02
P01
P00
R
W
$000B
SYNCON
FFH
NOHALF
ENHALF
-
FRUN
FRFREQ
HALFPOL
ENH
ENV
W
$000C
ENDAC
FFH
ENAD1
ENAD0
ENDK13
ENDK12
ENDK11
ENDK10
ENDK9
ENDK8
W
Vcc
I/O
Data Out
Data In
Figure 6. I/O Structure
P W M
Output
P W M
Data In
Figure 7. PWM Output Structure
Vcc
O/P
Data Out
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