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| 型號： | NT68P61A |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 8-Bit Microcontroller for Monitor (24K OTP ROM Type) |
| 中文描述： | 8位微控制器的監(jiān)視器（足金檢察官辦公室光盤形式） |
| 文件頁數(shù)： | 18/48頁 |
| 文件大?。?/td> | 1057K |
| 代理商： | NT68P61A |
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NT68P61A
18
8. PWM DACs (Pulse Width Modulation D/A Converters)
There are 14 PWM D/A converters with 8-bit resolution in NT68P61A. Eight of these D/A (DAC0 - DAC7) converters are
open-drain output structures with 12V applied (maximum), and the other six D/A converters (DAC8 - DAC13) are
open-drain output structures with 5V applied (maximum). The PWM frequency is 31.25 KHz on 8 MHz system clock. Use
of a different oscillator frequency will result in different PWM frequency. As DAC8 - DAC13 are shared with I/O port pins,
user can write '0' to corresponding enable bit in the ENDAC control register to activate each of DACH8 - 13. There are 14-
channel readable DACH registers corresponding to 14 D/A converters. Each PWM output pulse width is programmable by
setting the 8 bit digital to the corresponding DACH registers. When these DACH registers are set to 00H, the DAC will
output LOW (GND level) and each bit addition will add 125ns pulse width. After reset, all DAC outputs are set to 80H (1/2
duty output). Refer to Figure 4 for the detailed timing diagram of PWM D/A output.
01
02
m
255 (FF)
8MHz Fosc
255
0
1
2
m
m+1
m+2
255
0
1
PWM value:
00
Figure 4. The DAC Output Timing Diagram and Wave Table
DKVL7
DKVL6
DKVL5
DKVL4
DKVL3
DKVL2
DKVL1
DKVL0
DAC Output Duty Cycle
0
0
0
0
0
0
0
0
GND
0
0
0
0
0
0
0
1
1/256 Vref.
0
0
0
0
0
0
1
0
2/256 Vref.
0
0
0
0
0
0
1
1
3/256 Vref.
0
0
0
0
0
1
0
0
4/256 Vref.
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
X /256 Vref.
1
1
1
1
1
1
1
0
254/256 Vref.
1
1
1
1
1
1
1
1
255/256 Vref.
The DAC value correspondent to PWM output
* Vref. is 12V or 5V
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