參數(shù)資料
型號: MX28F160C3BXAC-90
廠商: MACRONIX INTERNATIONAL CO LTD
元件分類: DRAM
英文描述: 16M-BIT [1M x16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY
中文描述: 1M X 16 FLASH 3V PROM, 90 ns, PBGA48
封裝: 8 X 6 MM, 1.20 MM HEIGHT, 0.75 MM PITCH, MO-207, CSP-48
文件頁數(shù): 11/44頁
文件大?。?/td> 429K
代理商: MX28F160C3BXAC-90
11
P/N:PM0867
MX28F160C3T/B
REV. 1.2, MAR. 17, 2004
Table 3. Command Definition (1)
Command
Bus
Cycles
Required
1
> 2
2
2
1
2
2
1
Notes
First Bus Cycle
Second Bus Cycle
Operation Address
(1)
Operation Address
(1)
Write
Write
Write
Write
Write
Write
Write
Write
Data
(3)
FFH
90H
98H
70H
50H
20H
40H/10H
B0H
Data
(3)
(2)
X
X
X
X
X
X
X
X
(2)
Read Array
Read Configuration
Read Query
Read Status Register
Clear Status Register
Sector Erase/Confirm
Word Write
Program/Erase Suspend
2,4
2,7
3
3
Read
Read
Read
IA
QA
X
ID
QD
SRD
Write
Write
SA
WA
D0H
WD
2,5
Program/Erase Resume
1
Write
X
D0H
Sector Lock
Sector Unlock
Lock-Down Sector
Protection Program
2
2
2
2
Write
Write
Write
Write
X
X
X
X
60H
60H
60H
C0H
Write
Write
Write
Write
SA
SA
SA
PA
01H
D0H
2FH
PD
6
Notes:
1. Bus operation are defined in Table 2 and referred to AC Timing Waveform.
2. X=Any address within device.
IA=ID-Code Address (refer to Table 4).
ID=Data read from identifier code.
SA=Sector Address within the sector being erased.
WA=Address of memory location to be written.
WD=Data to be written at location WA.
PA=Program Address, PD=Program Data
QA=Query Address, QD=Query Data.
3. Data is latched from the rising edge of WE or CE (whichever goes high first)
SRD=Data read from status register, see Table 6 for description of the status register bits.
4. Following the Read Configuration codes command, read operation access manufacturer, device codes, sector
lock/unlock codes, see chapter 4.2.
5. Either 40H or 10H command is recognized by the WSM as word write setup.
6. The sector unlock operation simultaneously clear all sector lock.
7. Read Query Command is read for CFI query information.
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