參數(shù)資料
型號: MT90826AV
廠商: ZARLINK SEMICONDUCTOR INC
元件分類: 路由/交換
英文描述: Quad Digital Switch
中文描述: TELECOM, DIGITAL TIME SWITCH, PBGA144
封裝: 13 X 13 MM, 1.25 MM HEIGHT, MO-192, LBGA-144
文件頁數(shù): 25/46頁
文件大?。?/td> 571K
代理商: MT90826AV
MT90826
Data Sheet
25
Zarlink Semiconductor Inc.
Input Stream
Offset
Measurement Result from
Frame Delay Bits
Corresponding Input Offset Bits
FD9
FD2
FD1
FD0
IFn3
IFn2
IFn1
IFn0
No internal master clock shift
(Default)
1
0
0
0
0
0
0
0
+ 0.5 internal master clock shift
0
0
0
0
0
0
0
1
+ 1.0 internal master clock shift
1
0
0
1
0
0
1
0
+ 1.5 internal master clock shift
0
0
0
1
0
0
1
1
+ 2.0 internal master clock shift
1
0
1
0
0
1
0
0
+ 2.5 internal master clock shift
0
0
1
0
0
1
0
1
+ 3.0 internal master clock shift
1
0
1
1
0
1
1
0
+ 3.5 internal master clock shift
0
0
1
1
0
1
1
1
+ 4.0 internal master clock shift
1
1
0
0
1
0
0
0
+ 4.5 internal master clock shift
0
1
0
0
1
0
0
1
Table 9 - Frame delay Bits (FD9, FD2-0) and Input Offset Bits (IFn3-0)
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