參數(shù)資料
型號: MT90221
廠商: Mitel Networks Corporation
英文描述: Quad IMA/UNI PHY Device(四端口 IMA/UNI 物理層設(shè)備(四端口ATM IMA和UNI處理器))
中文描述: 四IMA的/單向物理層設(shè)備(IMA的四端口/單向物理層設(shè)備(四端口自動(dòng)柜員機(jī)IMA的和單向處理器))
文件頁數(shù): 72/116頁
文件大?。?/td> 309K
代理商: MT90221
MT90221
64
7.8
RX Recombiner Registers Description
Tables 75 to 79 describe the
RX Recombiner
registers.
Address (Hex):
Direct access
Reset Value (Hex):
180 - 183
1 register per RX link
00
Bit #
Type
Description
7:3
2
R
Unused. Read all 0’s.
Recombiner Control: 1 to enable the recombiner and a 0 to disable. This bit works in
conjunction with the RX Recombiner Delay register.
These 2 bits specify which IMA Group the link belongs to:
00: IMA Group #0
01: IMA Group #1
10: IMA Group #2
11: IMA Group #3.
R/W
1:0
R/W
Table 75 - RX Recombiner Registers
Address (Hex):
Direct access
282
1 register for all links. Note: the first link of a group SHALL
NOT be enabled in delayed recombination mode
00
Reset Value (Hex):
Bit #
Type
Description
7-4
3
R/W
R/W
Reserved. Write 0 for normal operation.
A 1 enables the circuitry to wait for the first User cells to be received before adding the
link 3 to the recombiner process. A 0 will include the link 3 in the recombiner as soon as it
is enabled in the RX Recombiner register.
A 1 enables the circuitry to wait for the first User cells to be received before adding the
link 2 to the recombiner process. A 0 will include the link 2 in the recombiner as soon as it
is enabled in the RX Recombiner register.
A 1 enables the circuitry to wait for the first User cells to be received before adding the
link 1 to the recombiner process. A 0 will include the link 1 in the recombiner as soon as it
is enabled in the RX Recombiner register.
A 1 enables the circuitry to wait for the first User cells to be received before adding the
link 0 to the recombiner process. A 0 will include the link 0 in the recombiner as soon as it
is enabled in the RX Recombiner register.
2
R/W
1
R/W
0
R/W
Table 76 - RX Recombiner Delay Control Registers
Address (Hex):
Direct access
Reset Value (Hex):
29F
00
Bit #
Type
Description
7:4
3:0
R/W
R/W
Reserved.
Each bit reports the recombination status for a link. A 1 means that the recombination is
enabled. The bit 3 reports for link 3 and so on so forth. Do not write to this register.
Table 77 - Enable Recombination Status
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