- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383644 > MT90221 (Mitel Networks Corporation) Quad IMA/UNI PHY Device(四端口 IMA/UNI 物理層設(shè)備（四端口ATM IMA和UNI處理器）) PDF資料下載
參數(shù)資料
| 型號： | MT90221 |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | Quad IMA/UNI PHY Device(四端口 IMA/UNI 物理層設(shè)備（四端口ATM IMA和UNI處理器）) |
| 中文描述： | 四IMA的/單向物理層設(shè)備（IMA的四端口/單向物理層設(shè)備（四端口自動柜員機IMA的和單向處理器）） |
| 文件頁數(shù)： | 5/116頁 |
| 文件大小： | 309K |
| 代理商： | MT90221 |
第1頁第2頁第3頁第4頁當(dāng)前第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁
MT90221
iii
Table of Contents
6.0 Support Blocks............................................................................................................................................. 33
6.1 Counter Block........................................................................................................................................... 33
6.1.1 UTOPIA Input I/F counters............................................................................................................... 33
6.1.2 Transmit PCM I/F Counters ............................................................................................................. 33
6.1.3 Receive PCM I/F Counters .............................................................................................................. 33
6.1.4 Access to the Counters.................................................................................................................... 33
6.2 Interrupt Block .......................................................................................................................................... 34
6.2.1 IRQ Master Status and IRQ Master Enable Registers..................................................................... 34
6.2.2 IRQ Link Status and IRQ Link Enable Registers.............................................................................. 34
6.2.2.1
Bit 7 and 6 of IRQ Link 0 Status and IRQ Link 0 Enable Registers .......................................... 35
6.2.3 IRQ Link UNI Overflow and IRQ UTOPIA Input UNI Overflow Status Registers............................. 36
6.2.4 IRQ IMA Group Overflow Status and Enable Registers................................................................... 36
6.2.5 IRQ IMA Overflow Status and RX UTOPIA IMA Group FIFO Overflow Enable Registers .............. 36
6.3 Register and Memory Map....................................................................................................................... 36
6.3.1 Access to the Various Registers...................................................................................................... 36
6.3.2 Direct Access................................................................................................................................... 37
6.3.3 Indirect Access................................................................................................................................. 37
6.3.4 Clearing of Status Bits...................................................................................................................... 37
6.3.4.1
Toggle Bit.................................................................................................................................. 37
6.3.5 Test Modes ...................................................................................................................................... 37
7.0 Register Descriptions.................................................................................................................................. 40
7.1 Utopia Register Description...................................................................................................................... 41
7.2 TX Registers Description.......................................................................................................................... 45
7.3 TX ICP Register Description .................................................................................................................... 50
7.4 RX Registers Description ......................................................................................................................... 52
7.5 RX ICP Cell Registers Description........................................................................................................... 56
7.6 External SRAM Register Description ....................................................................................................... 58
7.7 RX Delay Registers Description............................................................................................................... 60
7.8 RX Recombiner Registers Description..................................................................................................... 63
7.9 TX/RX and PLL Control Registers Description......................................................................................... 65
7.10 Counter Registers Description ................................................................................................................ 70
7.11Interrupt Registers Description................................................................................................................. 72
7.12 Miscellaneous Registers Description ...................................................................................................... 76
8.0 Application Notes......................................................................................................................................... 77
8.1 Connecting the MT90220 to Various T1/E1 Framers............................................................................... 77
9.0 AC/DC Characteristics................................................................................................................................. 83
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MT90401 | SONET/SDH System Synchronizer(SONET/SDH 系統(tǒng)同步裝置（由一個數(shù)字鎖相環(huán)組成）) |
| MT9040 | T1/E1 Synchronizer(T1/E1 系統(tǒng)同步裝置（由一個數(shù)字鎖相環(huán)組成）) |
| MT9041A | () |
| MT9041B | T1/E1 System Synchronizer(T1/E1系統(tǒng)同步裝置（由一個數(shù)字鎖相環(huán)組成）) |
| MT9042B | () |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT90221AL | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:Quad IMA/UNI PHY Device |
| MT90222 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:4/8/16 Port IMA/TC PHY Device |
| MT90222AG | 制造商:Microsemi Corporation 功能描述:ATM IMA 40MBPS 2.5V 384BGA - Trays |
| MT90222AG2 | 制造商:Microsemi Corporation 功能描述:ATM IMA 40MBPS 2.5V 384BGA /BAKE/DRYPACK - Trays |
| MT90223AG | 制造商:Microsemi Corporation 功能描述:ATM IMA 80MBPS 2.5V 384BGA - Trays |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。