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參數(shù)資料
| 型號： | MT58L512Y32D |
| 廠商： | Micron Technology, Inc. |
| 英文描述： | 16Mb SYNCBURST⑩ SRAM |
| 中文描述： | ⑩的SRAM 16Mb的SYNCBURST |
| 文件頁數(shù)： | 22/34頁 |
| 文件大?。?/td> | 526K |
| 代理商： | MT58L512Y32D |
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16Mb: 1 Meg x 18, 512K x 32/36 Pipelined, DCD SyncBurst SRAM
MT58L1MY18D_2.p65 – Rev 7/00
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2000, Micron Technology, Inc.
16Mb: 1 MEG x 18, 512K x 32/36
PIPELINED, DCD SYNCBURST SRAM
ADVANCE
READ/WRITE TIMING
3
tKC
tKL
CLK
ADSP#
tADSH
tADSS
ADDRESS
tKH
OE#
ADSC#
CE#
(NOTE 2)
tAH
tAS
A2
tCEH
tCES
Q
High-Z
ADV#
Single WRITE
D(A3)
A4
A5
A6
D(A5)
D(A6)
D
BURST READ
Back-to-Back READs
(NOTE 5)
High-Z
Q(A2)
Q(A1)
Q(A4)
Q(A4+1)
Q(A4+2)
tWH
tWS
Q(A4+3)
tOEHZ
tDH
tDS
tOELZ
tKQLZ
tKQ
Back-to-Back
WRITEs
A1
BWE#,
BWa#-BWd#
(NOTE 4)
A3
DON’T CARE
UNDEFINED
NOTE:
1. Q(A4) refers to output from address A4. Q(A4 + 1) refers to output from the next internal burst address following A4.
2. CE2# and CE2 have timing identical to CE#. On this diagram, when CE# is LOW, CE2# is LOW and CE2 is HIGH. When
CE# is HIGH, CE2# is HIGH and CE2 is LOW.
3. The data bus (Q) remains in High-Z following a WRITE cycle unless an ADSP#, ADSC# or ADV# cycle is performed.
4. GW# is HIGH.
5. Back-to-back READs may be controlled by either ADSP# or ADSC#.
-6
-7.5
-10
SYM
t
ADSS
t
WS
t
DS
t
CES
t
AH
t
ADSH
t
WH
t
DH
t
CEH
MIN
1.5
1.5
1.5
1.5
0.5
0.5
0.5
0.5
0.5
MAX
MIN
1.5
1.5
1.5
1.5
0.5
0.5
0.5
0.5
0.5
MAX
MIN
2.0
2.0
2.0
2.0
0.5
0.5
0.5
0.5
0.5
MAX
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
READ/WRITE TIMING PARAMETERS
-6
-7.5
-10
SYM
t
KC
f
KF
t
KH
t
KL
t
KQ
t
KQLZ
t
OELZ
t
OEHZ
t
AS
MIN
6.0
MAX
MIN
7.5
MAX
MIN
10
MAX
UNITS
ns
MHz
ns
ns
ns
ns
ns
ns
ns
166
133
100
2.3
2.3
2.5
2.5
3.0
3.0
3.5
4.0
5.0
0
0
0
0
1.0
0
3.5
4.2
4.5
1.5
1.5
2.0
相關PDF資料 |
PDF描述 |
|---|---|
| MT58L64L18F | 64K x 18, 3.3V I/O, Flow-Through SyncBurst SRAM(1Mb,3.3V輸入/輸出,流通式同步脈沖靜態(tài)RAM) |
| MT58L32L32F | 32K x 32， 3.3V I/O, Flow-Through SyncBurst SRAM(1Mb,3.3V輸入/輸出,流通式同步脈沖靜態(tài)RAM) |
| MT58L32L36F | 32K x 36， 3.3V I/O, Flow-Through SyncBurst SRAM(1Mb,3.3V輸入/輸出，流通式同步脈沖靜態(tài)RAM) |
| MT58L64L18P | 64K x 18, 3.3V I/O, Pipelined, SCD SyncBurst SRAM(1Mb,3.3V輸入/輸出，流水線式，單循環(huán)取消選擇，同步脈沖靜態(tài)存儲器) |
| MT58L32L32P | 32K x 32, 3.3V I/O, Pipelined, SCD SyncBurst SRAM(1Mb,3.3V輸入/輸出，流水線式，單循環(huán)取消選擇，同步脈沖靜態(tài)存儲器) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MT58L512Y32DT-10 | 制造商:Cypress Semiconductor 功能描述:512KX32 SRAM PLASTIC TQFP 3.3V 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MT58L512Y32DT-10 ES | 制造商:Cypress Semiconductor 功能描述:512KX32 SRAM PLASTIC TQFP 3.3V |
| MT58L512Y32DT-6 | 制造商:Cypress Semiconductor 功能描述:DS2KX32 SRAM PLASTIC TQFP 3.3V 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MT58L512Y32PT-10 IT | 制造商:Cypress Semiconductor 功能描述:16MB 512KX32 SRAM PLASTIC IND |
| MT58L512Y32PT-6 | 制造商:Cypress Semiconductor 功能描述:512KX32 SRAM PLASTIC TQFP 3.3V |
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