參數(shù)資料
型號(hào)： MT46V64M8
廠商： Micron Technology, Inc.
英文描述： 16 Meg x 8 x 4 banks DDR SDRAM(16M x 8 x 4組,雙數(shù)據(jù)速率同步動(dòng)態(tài)RAM)
中文描述： 16梅格× 8 × 4銀行DDR SDRAM內(nèi)存（1,600 × 8 × 4組，雙數(shù)據(jù)速率同步動(dòng)態(tài)RAM）的
文件頁(yè)數(shù)： 20/70頁(yè)
文件大?。?/td> 2524K
代理商： MT46V64M8
20
512Mb: x4, x8, x16 DDR SDRAM
512Mx4x8x16DDR_A.p65
–
Rev. A; Pub 10/00
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2000, Micron Technology, Inc.
512Mb: x4, x8, x16
DDR SDRAM
ADVANCE
Figure 9
Nonconsecutive READ Bursts
CK
CK#
COMMAND
READ
NOP
NOP
NOP
NOP
NOP
ADDRESS
Bank,
Col
n
READ
Bank,
Col
b
COMMAND
ADDRESS
CL = 2
CK
CK#
DQ
DQS
CL = 2.5
DQ
DQS
DO
n
T0
T1
T2
T3
T2n
T3n
T4
T5
T5n
T6
NOTE
: 1. DO
n
(or
b
) = data-out from column
n
(or column
b
).
2. Burst length = 4 or 8 (if 4, the bursts are concatenated; if 8, the second burst interrupts the first).
3. Three subsequent elements of data-out appear in the programmed order following DO
n.
4. Three (or seven) subsequent elements of data-out appear in the programmed order following DO
b.
5. Shown with nominal
t
AC,
t
DQSCK, and
t
DQSQ.
6. Example applies when READ commands are issued to different devices or nonconsecutive READs.
READ
NOP
NOP
NOP
NOP
NOP
Bank,
Col
n
READ
Bank,
Col
b
T0
T1
T2
T3
T2n
T3n
T4
T5
T5n
T6
DO
b
DO
n
DO
b
DON
’
T CARE
TRANSITIONING DATA
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