參數(shù)資料
型號: MSC8101M1250C
廠商: MOTOROLA INC
元件分類: 數(shù)字信號處理
英文描述: Network Digital Signal Processor
中文描述: 64-BIT, 62.5 MHz, OTHER DSP, PBGA332
封裝: 17 X 17 MM, LIDDED FLIP CHIP, PLASTIC, BGA-332
文件頁數(shù): 5/104頁
文件大?。?/td> 877K
代理商: MSC8101M1250C
MSC8101 Technical Data, Rev. 16
Freescale Semiconductor
1-1
Signals/Connections
1
The MSC8101 external signals are organized into functional groups, as shown in
Table 1-1
,
Figure 1-1
, and
Figure 1-2
.
Table 1-1
lists the functional groups, states the number of signal connections in each group, and
references the table that gives details on multiplexed signals within each group.
Figure 1-1
shows MSC8101
external signals organized by function.
Figure 1-2
indicates how the parallel input/output (I/O) ports signals are
multiplexed. Because the parallel I/O design supported by the MSC8101 communications processor module
(CPM) is a subset of the parallel I/O signals supported by the MPC8260 device, port pins are not numbered
sequentially.
Table 1-1.
MSC8101
Functional Signal Groupings
Functional Group
Number of Signal
Connections
Detailed Description
Power (V
CC
, V
DD
, and GND)
80
Table 1-2
on page 1-4
Clock
6
Table 1-3
on page 1-4
Reset, configuration, and EOnCE
11
Table 1-4
on page 1-5
System bus, HDI16, and interrupts
133
Table 1-5
on page 1-7
Memory Controller
27
Table 1-6
on page 1-13
CPM Input/Output Parallel Ports
Port A
26
Table 1-7
on page 1-16
Port B
14
Table 1-8
on page 1-21
Port C
18
Table 1-9
on page 1-24
Port D
8
Table 1-10
on page 1-33
JTAG Test Access Port
5
Table 1-11
on page 1-36
Reserved (denotes connections that are always reserved)
5
Table 1-12
on page 1-36
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