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| 型號(hào)： | MPC8245TZU333D |
| 廠商： | MOTOROLA INC |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 333 MHz, RISC PROCESSOR, PBGA352 |
| 封裝： | 35 X 35 MM, 1.70 MM HEIGHT, 1.27 MM PITCH, CAVITY-UP, TBGA-352 |
| 文件頁(yè)數(shù)： | 42/60頁(yè) |
| 文件大?。?/td> | 674K |
| 代理商： | MPC8245TZU333D |
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MOTOROLA
MPC8245 Integrated Processor Hardware Specications
47
System Design Information
The arrangement shown in Figure 26 allows the COP to independently assert HRESET or TRST, while
ensuring that the target can drive HRESET as well. If the JTAG interface and COP header will not be used,
TRST should be tied to HRESET so that it is asserted when the system reset signal (HRESET) is asserted
ensuring that the JTAG scan chain is initialized during power-on.
The COP header shown in Figure 26 adds many benets—breakpoints, watchpoints, register and memory
examination/modication, and other standard debugger features are possible through this interface—and
can be as inexpensive as an unpopulated footprint for a header to be added when needed.
The COP interface has a standard header for connection to the target system, based on the 0.025"
square-post, 0.100" centered header assembly (often called a Berg header).
There is no standardized way to number the COP header shown in Figure 26; consequently, many different
pin numbers have been observed from emulator vendors. Some are numbered top-to-bottom then
left-to-right, while others use left-to-right then top-to-bottom, while still others number the pins counter
clockwise from pin 1 (as with an IC). Regardless of the numbering, the signal placement recommended in
Figure 26 is common to all known emulators.
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| MPC8245TZU350D | 功能描述:微處理器 - MPU 350MHz 665MIPS RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線(xiàn)寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類(lèi)型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
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