參數(shù)資料
型號(hào)： ML53612
廠商： OKI SEMICONDUCTOR CO., LTD.
英文描述： 64-Channel Full Duplex H.100/H.110 CT Bus System Interface and Time-Slot Interchange
中文描述： 64通道全雙工H.100/H.110 CT總線系統(tǒng)接口和時(shí)隙交換
文件頁數(shù)： 26/68頁
文件大?。?/td> 696K
代理商： ML53612
I
ML53612
I
––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––
22
Oki Semiconductor
Configuration Register Byte 5, AR = 0005h
DR_0
C
Definition
[3:0]
[43:40]
Master PLL Reference Select [3:0]
4
44
Reserved
[6:5]
[46:45]
Master PLL Reference Frequency [1:0]
7
47
Reserved
Master PLL Reference Select [3:0] (C_ [43:40]) (Read/Write)
0h
1h
2h
3h
4h
5h
6h
7h
8h
9h
ah
bh
ch
dh
eh
fh
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
None (Default)
Reserved
Reserved
Reserved
Reserved
Reserved
CT_NETREF_1
CT_NETREF_2
L_NETREF_0
L_NETREF_1
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Master PLL Reference Frequency [1:0] (C_ [46:45]) (Read/Write)
00
01
10
11
→
→
→
→
8 kHz (Default)
1.536 MHz
1.544 MHz
2.048 MHz
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