參數資料
型號: MC705JP7CPE
廠商: Freescale Semiconductor
文件頁數: 82/164頁
文件大小: 0K
描述: IC MCU 8BIT 224 BYTES RAM 28PDIP
標準包裝: 13
系列: HC05
核心處理器: HC05
芯體尺寸: 8-位
速度: 2.1MHz
連通性: SIO
外圍設備: POR,溫度傳感器,WDT
輸入/輸出數: 22
程序存儲器容量: 6KB(6K x 8)
程序存儲器類型: OTP
RAM 容量: 224 x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
數據轉換器: A/D 4x12b
振蕩器型: 內部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-DIP(0.600",15.24mm)
包裝: 管件
Memory
MC68HC705JJ7 MC68HC705JP7 Advance Information Data Sheet, Rev. 4.1
24
Freescale Semiconductor
$000C
SIOP Data Register
(SDR)
Read:
Bit 7
654321
Bit 0
Write:
Reset:
$000D
IRQ Status and Control Register
(ISCR)
Read:
IRQE
OM2
OM1
0
IRQF
000
Write:
R
IRQR
Reset:
1
10000
U
0
$000E
PEPROM Bit Select Register
(PEBSR)
Read:
PEB7
PEB6
PEB5
PEB4
PEB3
PEB2
PEB1
PEB0
Write:
Reset:
0
0000000
$000F
PEPROM Status and Control
Register (PESCR)
Read: PEDATA
0
PEPGM
0000
PEPRZF
Write:
RRR
Reset:
U
0000001
$0010
Pulldown Register Port A
and Port C(1) (PDRA)
Read:
Write:
PDICH
PDICL
PDIA5
PDIA4
PDIA3
PDIA2
PDIA1
PDIA0
Reset:
0
0000000
$0011
Pulldown Register B
(PDRB)
Read:
Write:
PDIB7
PDIB6
PDIB5
PDIB4
PDIB3
PDIB2
PDIB1
PDIB0
Reset:
0
0000000
$0012
Timer Control Register
(TCR)
Read:
ICIE
OCIE
TOIE
000
IEDG
OLVL
Write:
Reset:
0
00000
U
0
$0013
Timer Status Register
(TSR)
Read:
ICF
OCF
TOF
00000
Write:
Reset:
U
00000
$0014
Input Capture Register High
(ICRH)
Read:
Bit 15
14
13
12
11
10
9
Bit 8
Write:
Reset:
Unaffected by reset
$0015
Input Capture Register Low
(ICRL)
Read:
Bit 7
654321
Bit 0
Write:
Reset:
Unaffected by reset
$0016
Output Compare Register High
(OCRH)
Read:
Bit 15
14
13
12
11
10
9
Bit 8
Write:
Reset:
Unaffected by reset
$0017
Output Compare Register Low
(OCRL)
Read:
Bit 7
654321
Bit 0
Write:
Reset:
Unaffected by reset
Addr.
Register
Bit 7
65
4321
Bit 0
= Unimplemented
R
= Reserved
U = Unaffected
1. Features related to port C are only available on the 28-pin MC68HC705JP7 devices.
Figure 2-3. Register Summary (Sheet 2 of 3)
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