參數(shù)資料
型號: MC705JP7CPE
廠商: Freescale Semiconductor
文件頁數(shù): 36/164頁
文件大?。?/td> 0K
描述: IC MCU 8BIT 224 BYTES RAM 28PDIP
標準包裝: 13
系列: HC05
核心處理器: HC05
芯體尺寸: 8-位
速度: 2.1MHz
連通性: SIO
外圍設備: POR,溫度傳感器,WDT
輸入/輸出數(shù): 22
程序存儲器容量: 6KB(6K x 8)
程序存儲器類型: OTP
RAM 容量: 224 x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
數(shù)據(jù)轉換器: A/D 4x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-DIP(0.600",15.24mm)
包裝: 管件
Instruction Set
MC68HC705JJ7 MC68HC705JP7 Advance Information Data Sheet, Rev. 4.1
130
Freescale Semiconductor
14.3.4 Bit Manipulation Instructions
The CPU can set or clear any writable bit in the first 256 bytes of memory, which includes I/O registers
and on-chip RAM locations. The CPU can also test and branch based on the state of any bit in any of the
first 256 memory locations.
14.3.5 Control Instructions
These instructions act on central processor unit (CPU) registers and control CPU operation during
program execution.
Table 14-4. Bit Manipulation Instructions
Instruction
Mnemonic
Bit Clear
BCLR
Branch if Bit Clear
BRCLR
Branch if Bit Set
BRSET
Bit Set
BSET
Table 14-5. Control Instructions
Instruction
Mnemonic
Clear Carry Bit
CLC
Clear Interrupt Mask
CLI
No Operation
NOP
Reset Stack Pointer
RSP
Return from Interrupt
RTI
Return from Subroutine
RTS
Set Carry Bit
SEC
Set Interrupt Mask
SEI
Stop Oscillator and Enable IRQ/VPP Pin
STOP
Software Interrupt
SWI
Transfer Accumulator to Index Register
TAX
Transfer Index Register to Accumulator
TXA
Stop CPU Clock and Enable Interrupts
WAIT
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