參數(shù)資料
型號： MC705JP7CPE
廠商： Freescale Semiconductor
文件頁數(shù)： 12/164頁
文件大小： 0K
描述： IC MCU 8BIT 224 BYTES RAM 28PDIP
標(biāo)準(zhǔn)包裝： 13
系列： HC05
核心處理器： HC05
芯體尺寸： 8-位
速度： 2.1MHz
連通性： SIO
外圍設(shè)備： POR，溫度傳感器，WDT
輸入/輸出數(shù)： 22
程序存儲器容量： 6KB（6K x 8）
程序存儲器類型： OTP
RAM 容量： 224 x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 4x12b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 28-DIP（0.600"，15.24mm）
包裝： 管件
Input Capture Registers
MC68HC705JJ7 MC68HC705JP7 Advance Information Data Sheet, Rev. 4.1
Freescale Semiconductor
109
if multiple reads of the ACRH take place before the next read of the ACRL. Therefore, when reading the
MSB of the timer at ACRH, the LSB of the timer at ACRL must also be read to complete the read
sequence.
During power-on reset (POR), the counter is initialized to $FFFC and begins counting after the oscillator
startup delay. Because the counter is 16 bits and preceded by a fixed prescaler, the value in the counter
repeats every 262,144 internal bus clock cycles (524,288 oscillator cycles).
Reading the ACRH and ACRL in any order or any number of times does not have any effect on the 16-bit
free-running counter or the TOF flag bit.
NOTE
To prevent interrupts from occurring between readings of the ACRH and
ACRL, set the I bit in the condition code register (CCR) before reading
ACRH and clear the I bit after reading ACRL.
11.4 Input Capture Registers
The input capture function is a means to record the time at which an event occurs. The source of the event
can be the change on an external pin (PB3/AN3/TCAP) or the CPF2 flag bit of voltage comparator 2 in
the analog subsystem. The ICEN bit in the analog subsystem control register (ACR) at $001D selects
which source is the input signal. When the input capture circuitry detects an active edge on the selected
source, it latches the contents of the free-running timer counter registers into the input capture registers
as shown in Figure 11-6.
NOTE
Both the ICEN bit in the ACR and the IEDG bit in the TCR must be set when
using voltage comparator 2 to trigger the input capture function.
Figure 11-6. Timer Input Capture Block Diagram
Latching values into the input capture registers at successive edges of the same polarity measures the
period of the selected input signal. Latching the counter values at successive edges of opposite polarity
measures the pulse width of the signal.
ICIE
ICRH ($0014)
16-BIT COUNTER
÷ 4
INTERNAL
(OSC
÷ 2)
TIMER CONTROL REG.
TIMER
REQUEST
INPUT CAPTURE (ICF)
RESET
CLOCK
INTERRUPT
ICRL ($0015)
ICF
TIMER STATUS REG.
$0012
$0013
INTERNAL
$FFFC
DATA
READ
ICRH
READ
ICRL
LATCH
BUS
IEDG
EDGE
SELECT
& DETECT
LOGIC
IEDG
PB3
AN3
TCAP
INPUT
SELECT
MUX
CPF2
FLAG
ICEN
CONTROL
BIT
FROM
ANALOG
SUBSYSTEM
INTERNAL
DATA
BUS
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC705JP7CPE 制造商:Freescale Semiconductor 功能描述:IC 8BIT MCU 68HC05 2.1MHZ DIP-28
MC705K1CP 制造商:Motorola Inc 功能描述:16 PIN DIP INTEGRATED CIRCUIT
MC705L16CFUE 功能描述:8位微控制器 -MCU 8B MCU W/ EPROM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
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MC705P6ACDWE 制造商:Freescale Semiconductor 功能描述:8-Bit Microcontroller IC
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