參數(shù)資料
型號： MC705JP7CPE
廠商： Freescale Semiconductor
文件頁數(shù)： 26/164頁
文件大?。?/td> 0K
描述： IC MCU 8BIT 224 BYTES RAM 28PDIP
標準包裝： 13
系列： HC05
核心處理器： HC05
芯體尺寸： 8-位
速度： 2.1MHz
連通性： SIO
外圍設備： POR，溫度傳感器，WDT
輸入/輸出數(shù)： 22
程序存儲器容量： 6KB（6K x 8）
程序存儲器類型： OTP
RAM 容量： 224 x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 5.5 V
數(shù)據(jù)轉換器： A/D 4x12b
振蕩器型： 內部
工作溫度： -40°C ~ 85°C
封裝/外殼： 28-DIP（0.600"，15.24mm）
包裝： 管件
EPROM Registers
MC68HC705JJ7 MC68HC705JP7 Advance Information Data Sheet, Rev. 4.1
Freescale Semiconductor
121
DELAY — Stop Startup Delay Bit
This EPROM bit selects the number of bus cycles that must elapse before bus activity begins following
a restart from the stop mode.
1 = Startup delay is 4064 bus cycles.
0 = Startup delay is 16 bus cycles.
CAUTION
The 16-cycle delay option will work properly in devices with the internal
low-power oscillator or with a steady external clock source. Check
crystal/ceramic resonator specifications carefully before using the 16-cycle
delay option with a crystal or ceramic resonator.
OSCRES — Oscillator Resistor Bit
This EPROM bit configures the internal shunt resistor.
1 = Oscillator configured with 2 M shunt resistor
0 = Oscillator configured without a shunt resistor
NOTE
The optional oscillator resistor is NOT recommended for devices that use
an external RC oscillator. For such devices, this bit should be left erased as
a 0.
SWAIT — STOP Conversion to WAIT Bit
This EPROM bit disables the STOP instruction and prevents inadvertently turning off the COP
watchdog with a STOP instruction. When the SWAIT bit is set, a STOP instruction puts the MCU in
halt mode. Halt mode is a wait-like low-power state. The internal oscillator and timer clock continue to
run, but the CPU clock stops. When the SWAIT bit is clear, a STOP instruction stops the internal
oscillator, the internal clock, the CPU clock, the timer clock, and the COP watchdog timer.
1 = STOP instruction converted to WAIT instruction
0 = STOP instruction not converted to WAIT instruction
LVREN — Low-Voltage Reset Enable Bit
This EPROM bit enables the low-voltage reset (LVR) function.
1 = LVR function enabled
0 = LVR function disabled
PIRQ — Port A IRQ Enable Bit
This EPROM bit enables the PA3–PA0 pins to function as external interrupt sources.
1 = PA3–PA0 enabled as external interrupt sources
0 = PA3–PA0 not enabled as external interrupt sources
LEVEL — External Interrupt Sensitivity Bit
This EPROM bit makes the external interrupt inputs level-triggered as well as edge-triggered
1 = IRQ/VPP pin negative-edge triggered and low-level triggered;
PA3–PA0 pins positive-edge triggered and high-level triggered
0 = IRQ/VPP pin negative-edge triggered only; PA3–PA0 pins positive-edge triggered only
COPEN — COP Watchdog Enable Bit
This EPROM bit enables the COP watchdog.
1 = COP watchdog enabled
0 = COP watchdog disabled
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相關代理商/技術參數(shù)
參數(shù)描述
MC705JP7CPE 制造商:Freescale Semiconductor 功能描述:IC 8BIT MCU 68HC05 2.1MHZ DIP-28
MC705K1CP 制造商:Motorola Inc 功能描述:16 PIN DIP INTEGRATED CIRCUIT
MC705L16CFUE 功能描述:8位微控制器 -MCU 8B MCU W/ EPROM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
MC705P6ACDWE 功能描述:8位微控制器 -MCU MCU 176 BYTES RAM A/D RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
MC705P6ACDWE 制造商:Freescale Semiconductor 功能描述:8-Bit Microcontroller IC
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