參數(shù)資料
型號： MC68LNC705C9ACFN
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PQCC44
封裝： PLASTIC, LCC-44
文件頁數(shù)： 170/177頁
文件大小： 1941K
代理商： MC68LNC705C9ACFN
Serial Communications Interface (SCI)
Advance Information
MC68HC705C9A — Rev. 4.0
92
Serial Communications Interface (SCI)
MOTOROLA
9.11 Receive Data In (RDI)
Receive data is the serial data that is applied through the input line and
the SCI to the internal bus. The receiver circuitry clocks the input at a
rate equal to 16 times the baud rate. This time is referred to as the RT
rate in Figure 9-4 and as the receiver clock in Figure 9-6.
The receiver clock generator is controlled by the baud rate register;
however, the SCI is synchronized by the start bit, independent of the
transmitter.
Once a valid start bit is detected, the start bit, each data bit, and the stop
bit are sampled three times at RT intervals 8 RT, 9 RT, and 10 RT
(1 RT is the position where the bit is expected to start), as shown in
Figure 9-5. The value of the bit is determined by voting logic which takes
the value of the majority of the samples. A noise flag is set when all three
samples on a valid start bit or data bit or the stop bit do not agree.
Figure 9-4. SCI Examples of Start Bit Sampling Techniques
Figure 9-5. SCI Sampling Technique Used on All Bits
1111111
1
0000
1111111
1
0010
111
0111
10
0
NOISE
START
RDI
IDLE
1RT
2RT
3RT
4RT
5RT
6RT
7RT
RT CLOCK EDGES FOR ALL THREE EXAMPLES
16X INTERNAL SAMPLING CLOCK
9RT
8RT
10RT
16RT 1RT
SAMPLES
NEXT BIT
PREVIOUS BIT
RDI
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