參數(shù)資料
型號: MC68LNC705C9ACFN
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PQCC44
封裝: PLASTIC, LCC-44
文件頁數(shù): 143/177頁
文件大?。?/td> 1941K
代理商: MC68LNC705C9ACFN
Low-Power Modes
Advance Information
MC68HC705C9A — Rev. 4.0
68
Low-Power Modes
MOTOROLA
Figure 6-1. Stop Recovery Timing Diagram
6.4 Wait Mode
The WAIT instruction places the MCU in a low-power consumption
mode, but the wait mode consumes more power than the stop mode. All
CPU action is suspended, but the timer, serial communications interface
(SCI), serial peripheral interface (SPI), and the oscillator remain active.
Any interrupt or reset will cause the MCU to exit the wait mode.
During wait mode, the I bit in the CCR is cleared to enable interrupts. All
other registers, memory, and input/output lines remain in their previous
state. The timer, SCI, and SPI may be enabled to allow a periodic exit
from the wait mode.
3FFE
3FFF
INTERNAL
ADDRESS
BUS
INTERNAL
CLOCK
IRQ
(3)
IRQ
(2)
RESET
OSC1
(1)
t
ILCH
4064 t
cyc
RESET OR INTERRUPT
VECTOR FETCH
t
LIH
t
RL
Notes:
1. Represents the internal gating of the OSC1 pin
2. IRQ pin edge-sensitive mask option
3. IRQ pin level and edge-sensitive mask option
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