參數(shù)資料
型號: MC68LNC705C9ACFN
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PQCC44
封裝: PLASTIC, LCC-44
文件頁數(shù): 146/177頁
文件大?。?/td> 1941K
代理商: MC68LNC705C9ACFN
Input/Output (I/O) Ports
Advance Information
MC68HC705C9A — Rev. 4.0
70
Input/Output (I/O) Ports
MOTOROLA
Figure 7-1. Port A I/O Circuit
7.4 Port B
Port B is an 8-bit bidirectional port. The port B data register is at $0001
and the data direction register (DDR) is at $0005. The contents of the
port B data register are indeterminate at initial powerup and must be
initialized by user software. Reset does not affect the data registers, but
clears the data direction registers, thereby returning the ports to inputs.
Writing a 1 to a DDR bit sets the corresponding port pin to output mode.
Each of the port B pins has an optional external interrupt capability that
can be enabled by programming the corresponding bit in the port B mask
option register ($3FF0).
The interrupt option also enables a pullup device when the pin is
configured as an input. The edge or edge- and level-sensitivity of the
IRQ pin will also pertain to the enabled port B pins. Care needs to be
taken when using port B pins that have the pullup enabled. Before
switching from an output to an input, the data should be preconditioned
to a 1 to prevent an interrupt from occurring. The port B logic is shown in
DATA DIRECTION
REGISTER BIT
LATCHED OUTPUT
DATA BIT
I/O
PIN
INPUT
REG
BIT
INPUT
I/O
OUTPUT
INTERNAL
HC05
CONNECTIONS
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