參數(shù)資料
型號: MC68LNC705C9ACFN
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PQCC44
封裝: PLASTIC, LCC-44
文件頁數(shù): 150/177頁
文件大?。?/td> 1941K
代理商: MC68LNC705C9ACFN
Capture/Compare Timer
Advance Information
MC68HC705C9A — Rev. 4.0
74
Capture/Compare Timer
MOTOROLA
Figure 8-1. Capture/Compare Timer Block Diagram
8.3 Timer Operation
The core of the capture/compare timer is a 16-bit free-running counter.
The counter provides the timing reference for the input capture and
output compare functions. The input capture and output compare
functions provide a means to latch the times at which external events
occur, to measure input waveforms, and to generate output waveforms
and timing delays. Software can read the value in the 16-bit free-running
counter at any time without affecting the counter sequence.
Because of the 16-bit timer architecture, the I/O registers for the input
capture and output compare functions are pairs of 8-bit registers.
INPUT
CAPTURE
REGISTER
CLOCK
INTERNAL BUS
OUTPUT
COMPARE
REGISTER
HIGH
BYTE
LOW
BYTE
$16
$17
÷4
INTERNAL
PROCESSOR
16-BIT FREE
RUNNING
COUNTER
ALTERNATE
REGISTER
8-BIT
BUFFER
HIGH
BYTE
LOW
BYTE
$1A
$1B
$18
$19
HIGH
BYTE
LOW
BYTE
$14
$15
OUTPUT
COMPARE
CIRCUIT
OVERFLOW
DETECT
CIRCUIT
EDGE
DETECT
CIRCUIT
TIMER
STATUS
REG.
ICF OCF TOF $13
ICIE
IEDG OLVL
OUTPUT
LEVEL
REG.
RESET
TIMER
CONTROL
REG.
$12
OUTPUT
LEVEL
(TCMP)
INTERRUPT CIRCUIT
TOIE
OCIE
EDGE
INPUT
(TCAP)
D
CLK
C
Q
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