LIST OF TABLES (Continued)
Paragraph
Page
Number
Title
Number
xi
LIST OF ILLUSTRATIONS
Page
Number
Title
Number
1-1
Functional Block Diagram ............................................................................
1-2
2-1
Oscillator circuits: (a) External oscillator connections ..................................
2-6
2-1
Oscillator circuits: (b) One crystal driving two MCUs ...................................
2-6
2-1
Oscillator circuits: (c) Common crystal connections ....................................
2-6
3-1
Memory Map ................................................................................................
3-3
3-2
Control and Status Registers (Page 1) ........................................................
3-7
3-2
Control and Status Registers (Page 2) ........................................................
3-8
3-2
Control and Status Registers (Page 3) ........................................................
3-9
3-2
Control and Status Registers (Page 4) ........................................................
3-10
5-1
Interrupt Stacking Order ...............................................................................
5-8
5-2
Processing Flow out of Resets ....................................................................
5-10
5-2
Processing Flow out of Resets (contd) ........................................................
5-11
5-3
Interrupt Priority Resolution .........................................................................
5-12
5-3
Interrupt Priority Resolution (contd) .............................................................
5-13
5-4
Interrupt Source Resolution within SCI ........................................................
5-14
7-1
Serial Communications Interface Block Diagram .........................................
7-3
7-2
Rate Generator Division ...............................................................................
7-4
7-3
Data Format .................................................................................................
7-4
Sampling Technique Used On All Bits .........................................................
7-6
7-5
Examples of Start Bit Sampling Techniques ................................................
7-7
7-6
SCI Artificial Start Following a Framing Error ..............................................
7-8
7-7
SCI Start Bit Following a Break ....................................................................
7-8
8-1
Data Clock Timing Diagram .........................................................................
8-2
Serial Peripheral Interface Block Diagram ...................................................
8-4
8-3
Serial Peripheral Interface Master-Slave Interconnection ............................
8-5
10-1
PWM Timer Module Block Diagram .............................................................
10-2
11-1
Event Counter Operating Modes .................................................................
11-2
8-bit PWM with Selectable Phase Shift (Mode 0) ........................................
11-3
8-bit PWM and Pulse Accumulator (Mode 1) ...............................................
11-6
11-4
8-bit PWM with Period Counter (Mode 2) ....................................................
11-9
11-5
8-bit PWM with 256 Clock Prescaler (Mode 3) ............................................
11-13
12-1
Programming Model .....................................................................................
12-2
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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