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參數(shù)資料
| 型號(hào)： | MC68HC11G7CFN |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQCC84 |
| 封裝： | PLASTIC, LCC-84 |
| 文件頁(yè)數(shù)： | 21/195頁(yè) |
| 文件大小： | 1940K |
| 代理商： | MC68HC11G7CFN |
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ANALOG-TO-DIGITAL CONVERTER
9-5
9.4.4
8-Channel Continuous Scan
Conversions continue to be performed on all eight channels with the ninth conversion being stored
in the ADR1 register (replacing the earlier conversion result for the first channel in the group), the
tenth conversion overwrites ADR2, the eleventh overwrites ADR3, and so on, continuously. Using
this second variation the data in any result register is, at most, eight conversion times old.
9.5
POWER-UP AND CLOCK SELECT
A/D power up is controlled by the ADPU bit in the OPTION register. When ADPU is cleared, power
to the A/D system is removed. When ADPU is set, the A/D system is enabled. A delay of 100
microseconds is required after turning on the A/D converter, to allow the analog bias voltages to
stabilize.
Clock select is controlled by the CSEL bit in the OPTION register. When CSEL is cleared, the A/D
system uses the system E-clock. When CSEL is set, the A/D system uses an internal R-C clock
source, nominally 1.5 MHz, in which case the R-C internal clock should be selected. A delay of 10
milliseconds is required, after changing CSEL from zero to one, to allow the R-C oscillator to start
and internal bias voltages to settle.
When the A/D system is operating with the MCU E-clock, all switching and comparator operations
are synchronized with the MCU clock. This allows the comparator results to be sampled at quiet
clock times to minimise the effect of internal switching noise. As the internal R-C oscillator is
asynchronous with respect to the MCU clock, internal switching noise is more likely to affect the
overall accuracy of the A/D results, when using this oscillator, than when using the E-clock.
9.6
OPERATION IN STOP AND WAIT MODES
If a conversion sequence is still in process when the MC68HC11G5 enters the STOP or WAIT mode,
the conversion of the current channel is suspended. When the MCU resumes normal operation, that
channel is re-sampled and the conversion sequence resumes. As the MCU exits the WAIT mode,
the A/D circuits are stable and valid results can be obtained on the first conversion. However, in
STOP mode the comparator, charge pump and R-C oscillator are turned off. If the MC68HC11G5
exits the STOP mode with a delay (as is normal), there will automatically be enough time for these
circuits to stabilize before the first conversion. If the MC68HC11G5 exits the STOP mode with no
delay (DLY bit in OPTION register equal to zero) and a stable external clock supplied, the user must
allow about 100 microseconds for the A/D circuitry to stabilize and to avoid invalid results.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| MC68HC11K0 | 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:HCMOS Microcontroller Unit |
| MC68HC11K0CFN2 | 制造商:MOTOROLA 制造商全稱(chēng):Motorola, Inc 功能描述:8-Bit Microcontroller |
| MC68HC11K0CFN3 | 制造商:MOTOROLA 制造商全稱(chēng):Motorola, Inc 功能描述:8-Bit Microcontroller |
| MC68HC11K0CFN4 | 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:HCMOS MICROCONTROLLER UNIT |
| MC68HC11K0CFNE3 | 功能描述:8位微控制器 -MCU 8B MCU 768 RAM - EPP RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
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