參數(shù)資料
型號: MC68HC11G7CFN
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQCC84
封裝: PLASTIC, LCC-84
文件頁數(shù): 109/195頁
文件大?。?/td> 1940K
代理商: MC68HC11G7CFN
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OPERATING MODES AND SIGNAL DESCRIPTION
2-2
2.1.1
Single Chip Operating Mode
In single chip mode, the MCU functions as a self-contained microcontroller and has no external
address or data bus. This mode provides maximum use of the pins for on-chip peripheral functions
(66 pins). In single chip mode the R/W line is always high (read) to facilitate changing mode.
2.1.2
Expanded Non-Multiplexed Operating Mode
In the expanded non-multiplexed mode, the MCU can address up to 64 kbytes of address space.
High order address bits are output on Port B and low order address bits are output on Port F. The
bidirectional data bus is on Port C and the R/W pin is used to control the direction of data transfer
on this bus.
2.1.3
Bootstrap Operating Mode
This is a very versatile operating mode since there are essentially no limitations on the special
purpose program that can be loaded into internal RAM. The resident bootstrap program, contained
in the bootstrap ROM, uses the SCI to read a variable length program into on-chip RAM. Program
control is passed to RAM at location $0000 when an idle line of at least four characters occurs.
The MC68HC11G5 communicates through the SCI port. After reset in bootstrap mode, the SCI runs
at E/16 (7812 baud for E-clock = 2 MHz). A break condition is output on the SCI transmitter. For
normal use of the bootstrap program, the user must send $FF to the SCI receiver at either E/16 or
E/104 (1200 baud for E-clock = 2 MHz).
Note: The $FF is not echoed through the SCI transmitter.
In this mode all interrupt vectors are mapped to pseudo-vectors in RAM (refer to Table 2-2). This
allows programmers to use their own service-routine addresses. Each pseudo-vector is allowed
three bytes of space, rather than the two bytes for normal vectors, because an explicit jump (JMP)
opcode is needed to cause the desired jump to the user’s service-routine address.
Since the SMOD control bit is initialized to one, all of the privileged control bits are accessible in this
mode. This allows the bootstrap mode to be used for test and diagnostic functions on completed
modules. Mode switching can occur under program control by writing to the SMOD and MDA bits
of the HPRIO register.
2.1.4
Test Operating Mode
This special expanded mode is primarily intended for factory testing. In this mode the reset and
interrupt vectors are fetched externally from locations $BFFE – $BFFF. The SMOD bit in the HPRIO
register will be set, indicating that a special mode is in effect and allowing the user to write to certain
privileged control bits which are normally read-only bits. Also, a special register, TEST1, is enabled
which allows several factory test functions to be invoked.
It is also possible to change from the test mode to a normal operating mode by writing a zero to the
SMOD bit. Once this bit is cleared, it cannot be changed back to one without going through a reset
sequence.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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