
Electrical Specifications
Data Sheet
MC68HC908SR12MC68HC08SR12 — Rev. 5.0
384
Electrical Specifications
Freescale Semiconductor
Table 24-16. MMIIC Interface Input/Output Signal Timing
Characteristic
Symbol
Min
Typ
Max
Unit
Comments
Operating frequency
f
SMB
10
100
kHz
MMIIC operating frequency
Bus free time
t
BUF
4.7
μ
s
Bus free time between STOP and
START condition
Repeated start hold time.
t
HD.STA
4.0
μ
s
Hold time after (repeated) START
condition. After this period, the first
clock is generated.
Repeated start setup time.
t
SU.STA
4.7
μ
s
Repeated START condition setup
time.
Stop setup time
t
SU.STO
4.0
μ
s
Stop condition setup time.
Hold time
t
HD.DAT
300
ns
Data hold time.
Setup time
t
SU.DAT
250
ns
Data setup time.
Clock low time-out
t
TIMEOUT
25
35
ms
Clock low time-out.
(1)
Clock low
t
LOW
4.7
μ
s
Clock low period
Clock high
t
HIGH
4.0
μ
s
Clock high period.
(2)
Slave clock low extend time
t
LOW.SEXT
25
ms
Cumulative clock low extend time
(slave device)
(3)
Master clock low extend time
t
LOW.MEXT
10
ms
Cumulative clock low extend time
(master device)
(4)
Fall time
t
F
300
ns
Clock/Data Fall Time
(5)
Rise time
t
R
1000
ns
Clock/Data Rise Time
(5)
Notes
:
1. Devices participating in a transfer will timeout when any clock low exceeds the value of T
TIMEOUT
min. of 25ms. Devices
that have detected a timeout condition must reset the communication no later than T
TIMEOUT
max of 35ms. The maximum
value specified must be adhered to by both a master and a slave as it incorporates the cumulative limit for both a master
(10 ms) and a slave (25 ms).
Software should turn-off the MMIIC module to release the SDA and SCL lines.
2. T
HIGH MAX
provides a simple guaranteed method for devices to detect the idle conditions.
3. T
LOW.SEXT
is the cumulative time a slave device is allowed to extend the clock cycles in one message from the initial start
to the stop. If a slave device exceeds this time, it is expected to release both its clock and data lines and reset itself.
4. T
LOW.MEXT
is the cumulative time a master device is allowed to extend its clock cycles within each byte of a message as
defined from start-to-ack, ack-to-ack, or ack-to-stop.
5. Rise and fall time is defined as follows: T
R
= (V
ILMAX
– 0.15) to (V
IHMIN
+ 0.15), T
F
= 0.9
×
V
DD
to (V
ILMAX
– 0.15).