MC68HC908SR12MC68HC08SR12 — Rev. 5.0
Data Sheet
Freescale Semiconductor
Pulse Width Modulator (PWM)
211
Data Sheet — MC68HC908SR12MC68HC08SR12
Section 13. Pulse Width Modulator (PWM)
13.1 Contents
13.2
Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .211
13.3
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .212
13.4
PWM Period and Resolution. . . . . . . . . . . . . . . . . . . . . . . . . .214
13.5
PWM Automatic Phase Control . . . . . . . . . . . . . . . . . . . . . . .215
13.6
Low-Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .216
13.7
Wait Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .216
13.8
Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .216
13.9
I/O Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .217
13.10 I/O Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .217
13.10.1 PWM Control Register (PWMCR) . . . . . . . . . . . . . . . . . . .217
13.10.2 PWM Clock Control Register (PWMCCR) . . . . . . . . . . . . .218
13.10.3 PWM Data Registers (PWMDR0–PWMDR2) . . . . . . . . . .219
13.10.4 PWM Phase Control Register . . . . . . . . . . . . . . . . . . . . . .220
13.2 Introduction
This section describes the pulse width modulator (PWM) module. The
PWM module provides three 8-bit PWM output channels, with an
independent 8-bit counter for each channel. The PWM period is equal to
1
P
CLK
seconds, where P
CLK
is the PWM counter clock.
For a 32MHz PWM counter clock, the PWM period is 8
μ
s (a PWM
frequency of 125kHz). The automatic phase control feature allows
phase delays between the channels.
Figure 13-2
shows the structure of the PWM module.
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