參數(shù)資料
型號： MC68HC08GP8ACFB
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 8.2 MHz, MICROCONTROLLER, PQFP44
封裝： PLASTIC, QFP-44
文件頁數(shù)： 15/126頁
文件大?。?/td> 4243K
代理商： MC68HC08GP8ACFB
Low-Voltage Inhibit (LVI)
LVI Status Register
MC68HC08GP8A
Data Sheet
MOTOROLA
Low-Voltage Inhibit (LVI)
111
10.3.3 Voltage Hysteresis Protection
Once the LVI has triggered (by having VDD fall below VTRIPF), the LVI will maintain
a reset condition until VDD rises above the rising trip point voltage, VTRIPR. This
prevents a condition in which the MCU is continually entering and exiting reset if
VDD is approximately equal to VTRIPF. VTRIPR is greater than VTRIPF by the
hysteresis voltage, VHYS.
10.3.4 LVI Trip Selection
The LVI5OR3 bit in the mask option register selects whether the LVI is configured
for 5-V or 3-V protection.
NOTE:
The microcontroller is guaranteed to operate at a minimum supply voltage. The trip
point (VTRIPF [5 V] or VTRIPF [3 V]) may be lower than this. See Section 20.
Electrical Specifications for the actual trip point voltages.
10.4 LVI Status Register
The LVI status register (LVISR) indicates if the VDD voltage was detected below
the VTRIPF level.
LVIOUT — LVI Output Bit
This read-only flag becomes set when the VDD voltage falls below the VTRIPF
trip voltage. See Table 10-1. Reset clears the LVIOUT bit.
Address:
$FE0C
Bit 7
654321
Bit 0
Read:
LVIOUT
0000000
Write:
Reset:
00000000
= Unimplemented
Figure 10-3. LVI Status Register (LVISR)
Table 10-1. LVIOUT Bit Indication
VDD
LVIOUT
VDD > VTRIPR
0
VDD < VTRIPF
1
VTRIPF < VDD < VTRIPR
Previous value
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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